4 files changed, 20 insertions, 20 deletions
diff --git a/sysdeps/powerpc/fpu/s_copysign.S b/sysdeps/powerpc/fpu/s_copysign.S
index 0f27fef809..f7a412db3c 100644
--- a/sysdeps/powerpc/fpu/s_copysign.S
+++ b/sysdeps/powerpc/fpu/s_copysign.S
@@ -26,15 +26,15 @@ ENTRY(__copysign)
 /* double [f1] copysign (double [f1] x, double [f2] y);
    copysign(x,y) returns a value with the magnitude of x and
    with the sign bit of y.  */
-	stwu	1,-16(1)
-	stfd	2,8(1)
-	lwz	3,8(1)
-	cmpwi   3,0
-	addi    1,1,16
+	stwu	r1,-16(r1)
+	stfd	f2,8(r1)
+	lwz	r3,8(r1)
+	cmpwi   r3,0
+	addi    r1,r1,16
 	blt     0f
-	fabs    1,1
+	fabs    f1,f1
 	blr
-0:	fnabs   1,1
+0:	fnabs   f1,f1
 	blr
 	END (__copysign)
 
diff --git a/sysdeps/powerpc/fpu/s_fabs.S b/sysdeps/powerpc/fpu/s_fabs.S
index ec0bdb461f..f152079e0a 100644
--- a/sysdeps/powerpc/fpu/s_fabs.S
+++ b/sysdeps/powerpc/fpu/s_fabs.S
@@ -21,7 +21,7 @@
 
 ENTRY(__fabs)
 /* double [f1] fabs (double [f1] x); */
-	fabs 1,1
+	fabs f1,f1
 	blr
 END(__fabs)
 
diff --git a/sysdeps/powerpc/fpu/s_fmax.S b/sysdeps/powerpc/fpu/s_fmax.S
index d5373d7bb1..3721db4c94 100644
--- a/sysdeps/powerpc/fpu/s_fmax.S
+++ b/sysdeps/powerpc/fpu/s_fmax.S
@@ -21,13 +21,13 @@
 
 ENTRY(__fmax)
 /* double [f1] fmax (double [f1] x, double [f2] y); */
-	fcmpu	0,1,2
-	blt	0,0f		/* if x < y, neither x nor y can be NaN... */
-	bnulr+	0
+	fcmpu	cr0,f1,f2
+	blt	cr0,0f		/* if x < y, neither x nor y can be NaN... */
+	bnulr+	cr0
 /* x and y are unordered, so one of x or y must be a NaN... */
-	fcmpu	1,2,2
-	bunlr	1
-0:	fmr	1,2
+	fcmpu	cr1,f2,f2
+	bunlr	cr1
+0:	fmr	f1,f2
 	blr
 END(__fmax)
 
diff --git a/sysdeps/powerpc/fpu/s_fmin.S b/sysdeps/powerpc/fpu/s_fmin.S
index 919ceb113b..384995f847 100644
--- a/sysdeps/powerpc/fpu/s_fmin.S
+++ b/sysdeps/powerpc/fpu/s_fmin.S
@@ -21,13 +21,13 @@
 
 ENTRY(__fmin)
 /* double [f1] fmin (double [f1] x, double [f2] y); */
-	fcmpu	0,1,2
-	bgt	0,0f		/* if x > y, neither x nor y can be NaN... */
-	bnulr+	0
+	fcmpu	cr0,f1,f2
+	bgt	cr0,0f		/* if x > y, neither x nor y can be NaN... */
+	bnulr+	cr0
 /* x and y are unordered, so one of x or y must be a NaN... */
-	fcmpu	1,2,2
-	bunlr	1
-0:	fmr	1,2
+	fcmpu	cr1,f2,f2
+	bunlr	cr1
+0:	fmr	f1,f2
 	blr
 END(__fmin)