diff options
Diffstat (limited to 'sysdeps/i386')
| -rw-r--r-- | sysdeps/i386/bits/byteswap.h | 6 | ||||
| -rw-r--r-- | sysdeps/i386/dl-machine.h | 12 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/e_log.S | 11 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/e_logf.S | 11 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/e_logl.S | 11 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/e_pow.S | 18 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/e_powf.S | 18 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/e_powl.S | 18 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/math_private.h | 18 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/s_nextafterl.c | 18 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/s_nexttoward.c | 25 | ||||
| -rw-r--r-- | sysdeps/i386/fpu/s_nexttowardf.c | 25 | ||||
| -rw-r--r-- | sysdeps/i386/i486/bits/atomic.h | 370 | ||||
| -rw-r--r-- | sysdeps/i386/i686/memcmp.S | 70 | ||||
| -rw-r--r-- | sysdeps/i386/ldbl2mpn.c | 13 | ||||
| -rw-r--r-- | sysdeps/i386/soft-fp/sfp-machine.h | 89 | ||||
| -rw-r--r-- | sysdeps/i386/sysdep.h | 14 |
17 files changed, 375 insertions, 372 deletions
diff --git a/sysdeps/i386/bits/byteswap.h b/sysdeps/i386/bits/byteswap.h index 7f2ddc2dc5..bed27559c5 100644 --- a/sysdeps/i386/bits/byteswap.h +++ b/sysdeps/i386/bits/byteswap.h @@ -1,6 +1,5 @@ /* Macros to swap the order of bytes in integer values. - Copyright (C) 1997, 1998, 2000, 2002, 2003, 2006, 2007 - Free Software Foundation, Inc. + Copyright (C) 1997,1998,2000,2002,2003,2006 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -67,8 +66,7 @@ __bswap_16 (unsigned short int __bsx) `bswap' opcode. On i386 we have to use three instructions. */ # if !defined __i486__ && !defined __pentium__ && !defined __pentiumpro__ \ && !defined __pentium4__ && !defined __k8__ && !defined __athlon__ \ - && !defined __k6__ && !defined __nocona__ && !defined __core2__ \ - && !defined __geode__ && !defined __amdfam10__ + && !defined __k6__ # define __bswap_32(x) \ (__extension__ \ ({ register unsigned int __v, __x = (x); \ diff --git a/sysdeps/i386/dl-machine.h b/sysdeps/i386/dl-machine.h index df3edf5460..04296d2a9a 100644 --- a/sysdeps/i386/dl-machine.h +++ b/sysdeps/i386/dl-machine.h @@ -1,5 +1,5 @@ /* Machine-dependent ELF dynamic relocation inline functions. i386 version. - Copyright (C) 1995-2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 1995-2005, 2006 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -34,9 +34,7 @@ elf_machine_matches_host (const Elf32_Ehdr *ehdr) } -#if defined PI_STATIC_AND_HIDDEN \ - && defined HAVE_VISIBILITY_ATTRIBUTE && defined HAVE_HIDDEN \ - && !defined HAVE_BROKEN_VISIBILITY_ATTRIBUTE +#ifdef PI_STATIC_AND_HIDDEN /* Return the link-time address of _DYNAMIC. Conveniently, this is the first element of the GOT, a special entry that is never relocated. */ @@ -244,7 +242,7 @@ _dl_start_user:\n\ define the value. ELF_RTYPE_CLASS_NOCOPY iff TYPE should not be allowed to resolve to one of the main executable's symbols, as for a COPY reloc. */ -#if defined USE_TLS && (!defined RTLD_BOOTSTRAP || USE___THREAD) +#if !defined RTLD_BOOTSTRAP || USE___THREAD # define elf_machine_type_class(type) \ ((((type) == R_386_JMP_SLOT || (type) == R_386_TLS_DTPMOD32 \ || (type) == R_386_TLS_DTPOFF32 || (type) == R_386_TLS_TPOFF32 \ @@ -352,7 +350,7 @@ elf_machine_rel (struct link_map *map, const Elf32_Rel *reloc, *reloc_addr = value; break; -#if defined USE_TLS && (!defined RTLD_BOOTSTRAP || USE___THREAD) +#if !defined RTLD_BOOTSTRAP || USE___THREAD case R_386_TLS_DTPMOD32: # ifdef RTLD_BOOTSTRAP /* During startup the dynamic linker is always the module @@ -476,7 +474,6 @@ elf_machine_rela (struct link_map *map, const Elf32_Rela *reloc, *reloc_addr = (value + reloc->r_addend - (Elf32_Addr) reloc_addr); break; -# ifdef USE_TLS case R_386_TLS_DTPMOD32: /* Get the information from the link map returned by the resolv function. */ @@ -513,7 +510,6 @@ elf_machine_rela (struct link_map *map, const Elf32_Rela *reloc, + reloc->r_addend; } break; -# endif /* use TLS */ case R_386_COPY: if (sym == NULL) /* This can happen in trace mode if an object could not be diff --git a/sysdeps/i386/fpu/e_log.S b/sysdeps/i386/fpu/e_log.S index ce55b72292..5604e638f5 100644 --- a/sysdeps/i386/fpu/e_log.S +++ b/sysdeps/i386/fpu/e_log.S @@ -36,15 +36,11 @@ limit: .double 0.29 ENTRY(__ieee754_log) fldln2 // log(2) fldl 4(%esp) // x : log(2) - fxam - fnstsw #ifdef PIC LOAD_PIC_REG (dx) #endif fld %st // x : x : log(2) - sahf - jc 3f // in case x is NaN or +-Inf -4: fsubl MO(one) // x-1 : x : log(2) + fsubl MO(one) // x-1 : x : log(2) fld %st // x-1 : x-1 : x : log(2) fabs // |x-1| : x-1 : x : log(2) fcompl MO(limit) // x-1 : x : log(2) @@ -58,9 +54,4 @@ ENTRY(__ieee754_log) 2: fstp %st(0) // x : log(2) fyl2x // log(x) ret - -3: jp 4b // in case x is +-Inf - fstp %st(1) - fstp %st(1) - ret END (__ieee754_log) diff --git a/sysdeps/i386/fpu/e_logf.S b/sysdeps/i386/fpu/e_logf.S index cd4538b594..128bb2754c 100644 --- a/sysdeps/i386/fpu/e_logf.S +++ b/sysdeps/i386/fpu/e_logf.S @@ -37,15 +37,11 @@ limit: .double 0.29 ENTRY(__ieee754_logf) fldln2 // log(2) flds 4(%esp) // x : log(2) - fxam - fnstsw #ifdef PIC LOAD_PIC_REG (dx) #endif fld %st // x : x : log(2) - sahf - jc 3f // in case x is NaN or +-Inf -4: fsubl MO(one) // x-1 : x : log(2) + fsubl MO(one) // x-1 : x : log(2) fld %st // x-1 : x-1 : x : log(2) fabs // |x-1| : x-1 : x : log(2) fcompl MO(limit) // x-1 : x : log(2) @@ -59,9 +55,4 @@ ENTRY(__ieee754_logf) 2: fstp %st(0) // x : log(2) fyl2x // log(x) ret - -3: jp 4b // in case x is +-Inf - fstp %st(1) - fstp %st(1) - ret END (__ieee754_logf) diff --git a/sysdeps/i386/fpu/e_logl.S b/sysdeps/i386/fpu/e_logl.S index 551dcf1e46..5023d3012f 100644 --- a/sysdeps/i386/fpu/e_logl.S +++ b/sysdeps/i386/fpu/e_logl.S @@ -37,15 +37,11 @@ limit: .double 0.29 ENTRY(__ieee754_logl) fldln2 // log(2) fldt 4(%esp) // x : log(2) - fxam - fnstsw #ifdef PIC LOAD_PIC_REG (dx) #endif fld %st // x : x : log(2) - sahf - jc 3f // in case x is NaN or +-Inf -4: fsubl MO(one) // x-1 : x : log(2) + fsubl MO(one) // x-1 : x : log(2) fld %st // x-1 : x-1 : x : log(2) fabs // |x-1| : x-1 : x : log(2) fcompl MO(limit) // x-1 : x : log(2) @@ -59,9 +55,4 @@ ENTRY(__ieee754_logl) 2: fstp %st(0) // x : log(2) fyl2x // log(x) ret - -3: jp 4b // in case x is +-Inf - fstp %st(1) - fstp %st(1) - ret END (__ieee754_logl) diff --git a/sysdeps/i386/fpu/e_pow.S b/sysdeps/i386/fpu/e_pow.S index 792f926902..c554ca4ecb 100644 --- a/sysdeps/i386/fpu/e_pow.S +++ b/sysdeps/i386/fpu/e_pow.S @@ -1,5 +1,5 @@ /* ix87 specific implementation of pow function. - Copyright (C) 1996, 1997, 1998, 1999, 2001, 2004, 2005, 2007 + Copyright (C) 1996, 1997, 1998, 1999, 2001, 2004, 2005 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1996. @@ -161,11 +161,10 @@ ENTRY(__ieee754_pow) 2: /* y is a real number. */ fxch // x : y fldl MO(one) // 1.0 : x : y - fldl MO(limit) // 0.29 : 1.0 : x : y - fld %st(2) // x : 0.29 : 1.0 : x : y - fsub %st(2) // x-1 : 0.29 : 1.0 : x : y - fabs // |x-1| : 0.29 : 1.0 : x : y - fucompp // 1.0 : x : y + fld %st(1) // x : 1.0 : x : y + fsub %st(1) // x-1 : 1.0 : x : y + fabs // |x-1| : 1.0 : x : y + fcompl MO(limit) // 1.0 : x : y fnstsw fxch // x : 1.0 : y sahf @@ -198,10 +197,9 @@ ENTRY(__ieee754_pow) // y == ħinf .align ALIGNARG(4) 12: fstp %st(0) // pop y - fldl MO(one) // 1 - fldl 4(%esp) // x : 1 - fabs // abs(x) : 1 - fucompp // < 1, == 1, or > 1 + fldl 4(%esp) // x + fabs + fcompl MO(one) // < 1, == 1, or > 1 fnstsw andb $0x45, %ah cmpb $0x45, %ah diff --git a/sysdeps/i386/fpu/e_powf.S b/sysdeps/i386/fpu/e_powf.S index c91545418d..c835b978b9 100644 --- a/sysdeps/i386/fpu/e_powf.S +++ b/sysdeps/i386/fpu/e_powf.S @@ -1,5 +1,5 @@ /* ix87 specific implementation of pow function. - Copyright (C) 1996, 1997, 1999, 2001, 2004, 2005, 2007 + Copyright (C) 1996, 1997, 1999, 2001, 2004, 2005 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1996. @@ -155,11 +155,10 @@ ENTRY(__ieee754_powf) 2: /* y is a real number. */ fxch // x : y fldl MO(one) // 1.0 : x : y - fldl MO(limit) // 0.29 : 1.0 : x : y - fld %st(2) // x : 0.29 : 1.0 : x : y - fsub %st(2) // x-1 : 0.29 : 1.0 : x : y - fabs // |x-1| : 0.29 : 1.0 : x : y - fucompp // 1.0 : x : y + fld %st(1) // x : 1.0 : x : y + fsub %st(1) // x-1 : 1.0 : x : y + fabs // |x-1| : 1.0 : x : y + fcompl MO(limit) // 1.0 : x : y fnstsw fxch // x : 1.0 : y sahf @@ -192,10 +191,9 @@ ENTRY(__ieee754_powf) // y == ħinf .align ALIGNARG(4) 12: fstp %st(0) // pop y - fldl MO(one) // 1 - flds 4(%esp) // x : 1 - fabs // abs(x) : 1 - fucompp // < 1, == 1, or > 1 + flds 4(%esp) // x + fabs + fcompl MO(one) // < 1, == 1, or > 1 fnstsw andb $0x45, %ah cmpb $0x45, %ah diff --git a/sysdeps/i386/fpu/e_powl.S b/sysdeps/i386/fpu/e_powl.S index 6215496207..74f422816a 100644 --- a/sysdeps/i386/fpu/e_powl.S +++ b/sysdeps/i386/fpu/e_powl.S @@ -1,5 +1,5 @@ /* ix87 specific implementation of pow function. - Copyright (C) 1996, 1997, 1998, 1999, 2001, 2004, 2005, 2007 + Copyright (C) 1996, 1997, 1998, 1999, 2001, 2004, 2005 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1996. @@ -161,11 +161,10 @@ ENTRY(__ieee754_powl) 2: /* y is a real number. */ fxch // x : y fldl MO(one) // 1.0 : x : y - fldl MO(limit) // 0.29 : 1.0 : x : y - fld %st(2) // x : 0.29 : 1.0 : x : y - fsub %st(2) // x-1 : 0.29 : 1.0 : x : y - fabs // |x-1| : 0.29 : 1.0 : x : y - fucompp // 1.0 : x : y + fld %st(1) // x : 1.0 : x : y + fsub %st(1) // x-1 : 1.0 : x : y + fabs // |x-1| : 1.0 : x : y + fcompl MO(limit) // 1.0 : x : y fnstsw fxch // x : 1.0 : y sahf @@ -211,10 +210,9 @@ ENTRY(__ieee754_powl) // y == ħinf .align ALIGNARG(4) 12: fstp %st(0) // pop y - fldl MO(one) // 1 - fldt 4(%esp) // x : 1 - fabs // abs(x) : 1 - fucompp // < 1, == 1, or > 1 + fldt 4(%esp) // x + fabs + fcompl MO(one) // < 1, == 1, or > 1 fnstsw andb $0x45, %ah cmpb $0x45, %ah diff --git a/sysdeps/i386/fpu/math_private.h b/sysdeps/i386/fpu/math_private.h deleted file mode 100644 index a426788ef1..0000000000 --- a/sysdeps/i386/fpu/math_private.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _MATH_PRIVATE_H - -#define math_opt_barrier(x) \ -({ __typeof(x) __x; \ - __asm ("" : "=t" (__x) : "0" (x)); \ - __x; }) -#define math_force_eval(x) \ -do \ - { \ - if (sizeof (x) <= sizeof (double)) \ - __asm __volatile ("" : : "m" (x)); \ - else \ - __asm __volatile ("" : : "f" (x)); \ - } \ -while (0) - -#include <math/math_private.h> -#endif diff --git a/sysdeps/i386/fpu/s_nextafterl.c b/sysdeps/i386/fpu/s_nextafterl.c index aef0a144e5..5b617cb4e7 100644 --- a/sysdeps/i386/fpu/s_nextafterl.c +++ b/sysdeps/i386/fpu/s_nextafterl.c @@ -27,7 +27,7 @@ static char rcsid[] = "$NetBSD: $"; */ #include "math.h" -#include <math_private.h> +#include "math_private.h" #ifdef __STDC__ long double __nextafterl(long double x, long double y) @@ -52,12 +52,9 @@ static char rcsid[] = "$NetBSD: $"; return x+y; if(x==y) return y; /* x=y, return y */ if((ix|hx|lx)==0) { /* x == 0 */ - long double u; SET_LDOUBLE_WORDS(x,esy&0x8000,0,1);/* return +-minsubnormal */ - u = math_opt_barrier (x); - u = u * u; - math_force_eval (u); /* raise underflow flag */ - return x; + y = x*x; + if(y==x) return y; else return x; /* raise underflow flag */ } if(esx>=0) { /* x > 0 */ if(esx>esy||((esx==esy) && (hx>hy||((hx==hy)&&(lx>ly))))) { @@ -112,9 +109,12 @@ static char rcsid[] = "$NetBSD: $"; } esy = esx&0x7fff; if(esy==0x7fff) return x+x; /* overflow */ - if(esy==0) { - long double u = x*x; /* underflow */ - math_force_eval (u); /* raise underflow flag */ + if(esy==0) { /* underflow */ + y = x*x; + if(y!=x) { /* raise underflow flag */ + SET_LDOUBLE_WORDS(y,esx,hx,lx); + return y; + } } SET_LDOUBLE_WORDS(x,esx,hx,lx); return x; diff --git a/sysdeps/i386/fpu/s_nexttoward.c b/sysdeps/i386/fpu/s_nexttoward.c index 9bd86a3724..2bd768e448 100644 --- a/sysdeps/i386/fpu/s_nexttoward.c +++ b/sysdeps/i386/fpu/s_nexttoward.c @@ -27,8 +27,7 @@ static char rcsid[] = "$NetBSD: $"; */ #include "math.h" -#include <math_private.h> -#include <float.h> +#include "math_private.h" #ifdef __STDC__ double __nexttoward(double x, long double y) @@ -53,12 +52,10 @@ static char rcsid[] = "$NetBSD: $"; return x+y; if((long double) x==y) return y; /* x=y, return y */ if((ix|lx)==0) { /* x == 0 */ - double u; + double x2; INSERT_WORDS(x,(esy&0x8000)<<16,1); /* return +-minsub */ - u = math_opt_barrier (x); - u = u * u; - math_force_eval (u); /* raise underflow flag */ - return x; + x2 = x*x; + if(x2==x) return x2; else return x; /* raise underflow flag */ } if(hx>=0) { /* x > 0 */ if (esy>=0x8000||((ix>>20)&0x7ff)>iy-0x3c00 @@ -88,14 +85,16 @@ static char rcsid[] = "$NetBSD: $"; hy = hx&0x7ff00000; if(hy>=0x7ff00000) { x = x+x; /* overflow */ - if (FLT_EVAL_METHOD != 0 && FLT_EVAL_METHOD != 1) - /* Force conversion to double. */ - asm ("" : "+m"(x)); + /* Force conversion to double. */ + asm ("" : "=m"(x) : "m"(x)); return x; } - if(hy<0x00100000) { - double u = x*x; /* underflow */ - math_force_eval (u); /* raise underflow flag */ + if(hy<0x00100000) { /* underflow */ + double x2 = x*x; + if(x2!=x) { /* raise underflow flag */ + INSERT_WORDS(x2,hx,lx); + return x2; + } } INSERT_WORDS(x,hx,lx); return x; diff --git a/sysdeps/i386/fpu/s_nexttowardf.c b/sysdeps/i386/fpu/s_nexttowardf.c index 25f70e4f4d..3fbe53c338 100644 --- a/sysdeps/i386/fpu/s_nexttowardf.c +++ b/sysdeps/i386/fpu/s_nexttowardf.c @@ -19,8 +19,7 @@ static char rcsid[] = "$NetBSD: $"; #endif #include "math.h" -#include <math_private.h> -#include <float.h> +#include "math_private.h" #ifdef __STDC__ float __nexttowardf(float x, long double y) @@ -45,12 +44,10 @@ static char rcsid[] = "$NetBSD: $"; return x+y; if((long double) x==y) return y; /* x=y, return y */ if(ix==0) { /* x == 0 */ - float u; + float x2; SET_FLOAT_WORD(x,((esy&0x8000)<<16)|1);/* return +-minsub*/ - u = math_opt_barrier (x); - u = u * u; - math_force_eval (u); /* raise underflow flag */ - return x; + x2 = x*x; + if(x2==x) return x2; else return x; /* raise underflow flag */ } if(hx>=0) { /* x > 0 */ if(esy>=0x8000||((ix>>23)&0xff)>iy-0x3f80 @@ -72,14 +69,16 @@ static char rcsid[] = "$NetBSD: $"; hy = hx&0x7f800000; if(hy>=0x7f800000) { x = x+x; /* overflow */ - if (FLT_EVAL_METHOD != 0) - /* Force conversion to float. */ - asm ("" : "+m"(x)); + /* Force conversion to float. */ + asm ("" : "=m"(x) : "m"(x)); return x; } - if(hy<0x00800000) { - float u = x*x; /* underflow */ - math_force_eval (u); /* raise underflow flag */ + if(hy<0x00800000) { /* underflow */ + float x2 = x*x; + if(x2!=x) { /* raise underflow flag */ + SET_FLOAT_WORD(x2,hx); + return x2; + } } SET_FLOAT_WORD(x,hx); return x; diff --git a/sysdeps/i386/i486/bits/atomic.h b/sysdeps/i386/i486/bits/atomic.h index c748761758..a27734c37e 100644 --- a/sysdeps/i386/i486/bits/atomic.h +++ b/sysdeps/i386/i486/bits/atomic.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc. +/* Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@redhat.com>, 2002. @@ -18,6 +18,7 @@ 02111-1307 USA. */ #include <stdint.h> +#include <tls.h> /* For tcbhead_t. */ typedef int8_t atomic8_t; @@ -76,6 +77,40 @@ typedef uintmax_t uatomic_max_t; : "r" (newval), "m" (*mem), "0" (oldval)); \ ret; }) + +#define __arch_c_compare_and_exchange_val_8_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + __asm __volatile ("cmpl $0, %%gs:%P5\n\t" \ + "je 0f\n\t" \ + "lock\n" \ + "0:\tcmpxchgb %b2, %1" \ + : "=a" (ret), "=m" (*mem) \ + : "q" (newval), "m" (*mem), "0" (oldval), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + ret; }) + +#define __arch_c_compare_and_exchange_val_16_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + __asm __volatile ("cmpl $0, %%gs:%P5\n\t" \ + "je 0f\n\t" \ + "lock\n" \ + "0:\tcmpxchgw %w2, %1" \ + : "=a" (ret), "=m" (*mem) \ + : "r" (newval), "m" (*mem), "0" (oldval), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + ret; }) + +#define __arch_c_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + __asm __volatile ("cmpl $0, %%gs:%P5\n\t" \ + "je 0f\n\t" \ + "lock\n" \ + "0:\tcmpxchgl %2, %1" \ + : "=a" (ret), "=m" (*mem) \ + : "r" (newval), "m" (*mem), "0" (oldval), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + ret; }) + /* XXX We do not really need 64-bit compare-and-exchange. At least not in the moment. Using it would mean causing portability problems since not many other 32-bit architectures have support for @@ -85,6 +120,8 @@ typedef uintmax_t uatomic_max_t; #if 1 # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ ({ __typeof (*mem) ret = *(mem); abort (); ret = (newval); ret = (oldval); }) +# define __arch_c_compare_and_exchange_val_64_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret = *(mem); abort (); ret = (newval); ret = (oldval); }) #else # ifdef __PIC__ # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ @@ -100,6 +137,24 @@ typedef uintmax_t uatomic_max_t; & 0xffffffff), \ "d" (((unsigned long long int) (oldval)) >> 32)); \ ret; }) + +# define __arch_c_compare_and_exchange_val_64_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + __asm __volatile ("xchgl %2, %%ebx\n\t" \ + "cmpl $0, %%gs:%P7\n\t" \ + "je 0f\n\t" \ + "lock\n" \ + "0:\tcmpxchg8b %1\n\t" \ + "xchgl %2, %%ebx" \ + : "=A" (ret), "=m" (*mem) \ + : "DS" (((unsigned long long int) (newval)) \ + & 0xffffffff), \ + "c" (((unsigned long long int) (newval)) >> 32), \ + "m" (*mem), "a" (((unsigned long long int) (oldval)) \ + & 0xffffffff), \ + "d" (((unsigned long long int) (oldval)) >> 32), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + ret; }) # else # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ ({ __typeof (*mem) ret; \ @@ -112,6 +167,22 @@ typedef uintmax_t uatomic_max_t; & 0xffffffff), \ "d" (((unsigned long long int) (oldval)) >> 32)); \ ret; }) + +# define __arch_c_compare_and_exchange_val_64_acq(mem, newval, oldval) \ + ({ __typeof (*mem) ret; \ + __asm __volatile ("cmpl $0, %%gs:%P7\n\t" \ + "je 0f\n\t" \ + "lock\n" \ + "0:\tcmpxchg8b %1" \ + : "=A" (ret), "=m" (*mem) \ + : "b" (((unsigned long long int) (newval)) \ + & 0xffffffff), \ + "c" (((unsigned long long int) (newval)) >> 32), \ + "m" (*mem), "a" (((unsigned long long int) (oldval)) \ + & 0xffffffff), \ + "d" (((unsigned long long int) (oldval)) >> 32), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + ret; }) # endif #endif @@ -139,21 +210,24 @@ typedef uintmax_t uatomic_max_t; result; }) -#define atomic_exchange_and_add(mem, value) \ +#define __arch_exchange_and_add_body(lock, pfx, mem, value) \ ({ __typeof (*mem) __result; \ __typeof (value) __addval = (value); \ if (sizeof (*mem) == 1) \ - __asm __volatile (LOCK_PREFIX "xaddb %b0, %1" \ + __asm __volatile (lock "xaddb %b0, %1" \ : "=r" (__result), "=m" (*mem) \ - : "0" (__addval), "m" (*mem)); \ + : "0" (__addval), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ else if (sizeof (*mem) == 2) \ - __asm __volatile (LOCK_PREFIX "xaddw %w0, %1" \ + __asm __volatile (lock "xaddw %w0, %1" \ : "=r" (__result), "=m" (*mem) \ - : "0" (__addval), "m" (*mem)); \ + : "0" (__addval), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ else if (sizeof (*mem) == 4) \ - __asm __volatile (LOCK_PREFIX "xaddl %0, %1" \ + __asm __volatile (lock "xaddl %0, %1" \ : "=r" (__result), "=m" (*mem) \ - : "0" (__addval), "m" (*mem)); \ + : "0" (__addval), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ else \ { \ __typeof (mem) __memp = (mem); \ @@ -161,41 +235,64 @@ typedef uintmax_t uatomic_max_t; __result = *__memp; \ do \ __tmpval = __result; \ - while ((__result = __arch_compare_and_exchange_val_64_acq \ + while ((__result = pfx##_compare_and_exchange_val_64_acq \ (__memp, __result + __addval, __result)) == __tmpval); \ } \ __result; }) +#define atomic_exchange_and_add(mem, value) \ + __arch_exchange_and_add_body (LOCK_PREFIX, __arch, mem, value) + +#define __arch_exchange_and_add_cprefix \ + "cmpl $0, %%gs:%P4\n\tje 0f\n\tlock\n0:\t" + +#define catomic_exchange_and_add(mem, value) \ + __arch_exchange_and_add_body (__arch_exchange_and_add_cprefix, __arch_c, \ + mem, value) + + +#define __arch_add_body(lock, pfx, mem, value) \ + do { \ + if (__builtin_constant_p (value) && (value) == 1) \ + atomic_increment (mem); \ + else if (__builtin_constant_p (value) && (value) == -1) \ + atomic_decrement (mem); \ + else if (sizeof (*mem) == 1) \ + __asm __volatile (lock "addb %b1, %0" \ + : "=m" (*mem) \ + : "ir" (value), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (lock "addw %w1, %0" \ + : "=m" (*mem) \ + : "ir" (value), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (lock "addl %1, %0" \ + : "=m" (*mem) \ + : "ir" (value), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else \ + { \ + __typeof (value) __addval = (value); \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __oldval = *__memp; \ + __typeof (*mem) __tmpval; \ + do \ + __tmpval = __oldval; \ + while ((__oldval = pfx##_compare_and_exchange_val_64_acq \ + (__memp, __oldval + __addval, __oldval)) == __tmpval); \ + } \ + } while (0) #define atomic_add(mem, value) \ - (void) ({ if (__builtin_constant_p (value) && (value) == 1) \ - atomic_increment (mem); \ - else if (__builtin_constant_p (value) && (value) == -1) \ - atomic_decrement (mem); \ - else if (sizeof (*mem) == 1) \ - __asm __volatile (LOCK_PREFIX "addb %b1, %0" \ - : "=m" (*mem) \ - : "ir" (value), "m" (*mem)); \ - else if (sizeof (*mem) == 2) \ - __asm __volatile (LOCK_PREFIX "addw %w1, %0" \ - : "=m" (*mem) \ - : "ir" (value), "m" (*mem)); \ - else if (sizeof (*mem) == 4) \ - __asm __volatile (LOCK_PREFIX "addl %1, %0" \ - : "=m" (*mem) \ - : "ir" (value), "m" (*mem)); \ - else \ - { \ - __typeof (value) __addval = (value); \ - __typeof (mem) __memp = (mem); \ - __typeof (*mem) __oldval = *__memp; \ - __typeof (*mem) __tmpval; \ - do \ - __tmpval = __oldval; \ - while ((__oldval = __arch_compare_and_exchange_val_64_acq \ - (__memp, __oldval + __addval, __oldval)) == __tmpval); \ - } \ - }) + __arch_add_body (LOCK_PREFIX, __arch, mem, value) + +#define __arch_add_cprefix \ + "cmpl $0, %%gs:%P3\n\tje 0f\n\tlock\n0:\t" + +#define catomic_add(mem, value) \ + __arch_add_body (__arch_add_cprefix, __arch_c, mem, value) #define atomic_add_negative(mem, value) \ @@ -236,30 +333,42 @@ typedef uintmax_t uatomic_max_t; __result; }) -#define atomic_increment(mem) \ - (void) ({ if (sizeof (*mem) == 1) \ - __asm __volatile (LOCK_PREFIX "incb %b0" \ - : "=m" (*mem) \ - : "m" (*mem)); \ - else if (sizeof (*mem) == 2) \ - __asm __volatile (LOCK_PREFIX "incw %w0" \ - : "=m" (*mem) \ - : "m" (*mem)); \ - else if (sizeof (*mem) == 4) \ - __asm __volatile (LOCK_PREFIX "incl %0" \ - : "=m" (*mem) \ - : "m" (*mem)); \ - else \ - { \ - __typeof (mem) __memp = (mem); \ - __typeof (*mem) __oldval = *__memp; \ - __typeof (*mem) __tmpval; \ - do \ - __tmpval = __oldval; \ - while ((__oldval = __arch_compare_and_exchange_val_64_acq \ - (__memp, __oldval + 1, __oldval)) == __tmpval); \ - } \ - }) +#define __arch_increment_body(lock, pfx, mem) \ + do { \ + if (sizeof (*mem) == 1) \ + __asm __volatile (lock "incb %b0" \ + : "=m" (*mem) \ + : "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (lock "incw %w0" \ + : "=m" (*mem) \ + : "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (lock "incl %0" \ + : "=m" (*mem) \ + : "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else \ + { \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __oldval = *__memp; \ + __typeof (*mem) __tmpval; \ + do \ + __tmpval = __oldval; \ + while ((__oldval = pfx##_compare_and_exchange_val_64_acq \ + (__memp, __oldval + 1, __oldval)) == __tmpval); \ + } \ + } while (0) + +#define atomic_increment(mem) __arch_increment_body (LOCK_PREFIX, __arch, mem) + +#define __arch_increment_cprefix \ + "cmpl $0, %%gs:%P2\n\tje 0f\n\tlock\n0:\t" + +#define catomic_increment(mem) \ + __arch_increment_body (__arch_increment_cprefix, __arch_c, mem) #define atomic_increment_and_test(mem) \ @@ -281,30 +390,42 @@ typedef uintmax_t uatomic_max_t; __result; }) -#define atomic_decrement(mem) \ - (void) ({ if (sizeof (*mem) == 1) \ - __asm __volatile (LOCK_PREFIX "decb %b0" \ - : "=m" (*mem) \ - : "m" (*mem)); \ - else if (sizeof (*mem) == 2) \ - __asm __volatile (LOCK_PREFIX "decw %w0" \ - : "=m" (*mem) \ - : "m" (*mem)); \ - else if (sizeof (*mem) == 4) \ - __asm __volatile (LOCK_PREFIX "decl %0" \ - : "=m" (*mem) \ - : "m" (*mem)); \ - else \ - { \ - __typeof (mem) __memp = (mem); \ - __typeof (*mem) __oldval = *__memp; \ - __typeof (*mem) __tmpval; \ - do \ - __tmpval = __oldval; \ - while ((__oldval = __arch_compare_and_exchange_val_64_acq \ - (__memp, __oldval - 1, __oldval)) == __tmpval); \ - } \ - }) +#define __arch_decrement_body(lock, pfx, mem) \ + do { \ + if (sizeof (*mem) == 1) \ + __asm __volatile (lock "decb %b0" \ + : "=m" (*mem) \ + : "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (lock "decw %w0" \ + : "=m" (*mem) \ + : "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (lock "decl %0" \ + : "=m" (*mem) \ + : "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else \ + { \ + __typeof (mem) __memp = (mem); \ + __typeof (*mem) __oldval = *__memp; \ + __typeof (*mem) __tmpval; \ + do \ + __tmpval = __oldval; \ + while ((__oldval = pfx##_compare_and_exchange_val_64_acq \ + (__memp, __oldval - 1, __oldval)) == __tmpval); \ + } \ + } while (0) + +#define atomic_decrement(mem) __arch_decrement_body (LOCK_PREFIX, __arch, mem) + +#define __arch_decrement_cprefix \ + "cmpl $0, %%gs:%P2\n\tje 0f\n\tlock\n0:\t" + +#define catomic_decrement(mem) \ + __arch_decrement_body (__arch_decrement_cprefix, __arch_c, mem) #define atomic_decrement_and_test(mem) \ @@ -327,21 +448,22 @@ typedef uintmax_t uatomic_max_t; #define atomic_bit_set(mem, bit) \ - (void) ({ if (sizeof (*mem) == 1) \ - __asm __volatile (LOCK_PREFIX "orb %b2, %0" \ - : "=m" (*mem) \ - : "m" (*mem), "ir" (1 << (bit))); \ - else if (sizeof (*mem) == 2) \ - __asm __volatile (LOCK_PREFIX "orw %w2, %0" \ - : "=m" (*mem) \ - : "m" (*mem), "ir" (1 << (bit))); \ - else if (sizeof (*mem) == 4) \ - __asm __volatile (LOCK_PREFIX "orl %2, %0" \ - : "=m" (*mem) \ - : "m" (*mem), "ir" (1 << (bit))); \ - else \ - abort (); \ - }) + do { \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "orb %b2, %0" \ + : "=m" (*mem) \ + : "m" (*mem), "ir" (1 << (bit))); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "orw %w2, %0" \ + : "=m" (*mem) \ + : "m" (*mem), "ir" (1 << (bit))); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "orl %2, %0" \ + : "=m" (*mem) \ + : "m" (*mem), "ir" (1 << (bit))); \ + else \ + abort (); \ + } while (0) #define atomic_bit_test_set(mem, bit) \ @@ -364,3 +486,51 @@ typedef uintmax_t uatomic_max_t; #define atomic_delay() asm ("rep; nop") + + +#define atomic_and(mem, mask) \ + do { \ + if (sizeof (*mem) == 1) \ + __asm __volatile (LOCK_PREFIX "andb %1, %b0" \ + : "=m" (*mem) \ + : "ir" (mask), "m" (*mem)); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (LOCK_PREFIX "andw %1, %w0" \ + : "=m" (*mem) \ + : "ir" (mask), "m" (*mem)); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (LOCK_PREFIX "andl %1, %0" \ + : "=m" (*mem) \ + : "ir" (mask), "m" (*mem)); \ + else \ + abort (); \ + } while (0) + + +#define __arch_or_body(lock, mem, mask) \ + do { \ + if (sizeof (*mem) == 1) \ + __asm __volatile (lock "orb %1, %b0" \ + : "=m" (*mem) \ + : "ir" (mask), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 2) \ + __asm __volatile (lock "orw %1, %w0" \ + : "=m" (*mem) \ + : "ir" (mask), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else if (sizeof (*mem) == 4) \ + __asm __volatile (lock "orl %1, %0" \ + : "=m" (*mem) \ + : "ir" (mask), "m" (*mem), \ + "i" (offsetof (tcbhead_t, multiple_threads))); \ + else \ + abort (); \ + } while (0) + +#define atomic_or(mem, mask) __arch_or_body (LOCK_PREFIX, mem, mask) + +#define __arch_or_cprefix \ + "cmpl $0, %%gs:%P3\n\tje 0f\n\tlock\n0:\t" + +#define catomic_or(mem, mask) __arch_or_body (__arch_or_cprefix, mem, mask) diff --git a/sysdeps/i386/i686/memcmp.S b/sysdeps/i386/i686/memcmp.S index 4bd5394bec..4fa6adea98 100644 --- a/sysdeps/i386/i686/memcmp.S +++ b/sysdeps/i386/i686/memcmp.S @@ -1,5 +1,5 @@ /* Compare two memory blocks for differences in the first COUNT bytes. - Copyright (C) 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 2004, 2005, 2006 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -44,13 +44,9 @@ absolute address. */ \ addl (%ebx,INDEX,4), %ebx -#ifdef HAVE_HIDDEN .section .gnu.linkonce.t.__i686.get_pc_thunk.bx,"ax",@progbits .globl __i686.get_pc_thunk.bx .hidden __i686.get_pc_thunk.bx -#else - .text -#endif ALIGN (4) .type __i686.get_pc_thunk.bx,@function __i686.get_pc_thunk.bx: @@ -384,38 +380,38 @@ END (BP_SYM (memcmp)) .section .rodata ALIGN (2) L(table_32bytes) : - .long L(0bytes) - . + 0x0 - .long L(1bytes) - . + 0x4 - .long L(2bytes) - . + 0x8 - .long L(3bytes) - . + 0xc - .long L(4bytes) - . + 0x10 - .long L(5bytes) - . + 0x14 - .long L(6bytes) - . + 0x18 - .long L(7bytes) - . + 0x1c - .long L(8bytes) - . + 0x20 - .long L(9bytes) - . + 0x24 - .long L(10bytes) - . + 0x28 - .long L(11bytes) - . + 0x2c - .long L(12bytes) - . + 0x30 - .long L(13bytes) - . + 0x34 - .long L(14bytes) - . + 0x38 - .long L(15bytes) - . + 0x3c - .long L(16bytes) - . + 0x40 - .long L(17bytes) - . + 0x44 - .long L(18bytes) - . + 0x48 - .long L(19bytes) - . + 0x4c - .long L(20bytes) - . + 0x50 - .long L(21bytes) - . + 0x54 - .long L(22bytes) - . + 0x58 - .long L(23bytes) - . + 0x5c - .long L(24bytes) - . + 0x60 - .long L(25bytes) - . + 0x64 - .long L(26bytes) - . + 0x68 - .long L(27bytes) - . + 0x6c - .long L(28bytes) - . + 0x70 - .long L(29bytes) - . + 0x74 - .long L(30bytes) - . + 0x78 - .long L(31bytes) - . + 0x7c + .long L(0bytes) - L(table_32bytes) + .long L(1bytes) - L(table_32bytes) + .long L(2bytes) - L(table_32bytes) + .long L(3bytes) - L(table_32bytes) + .long L(4bytes) - L(table_32bytes) + .long L(5bytes) - L(table_32bytes) + .long L(6bytes) - L(table_32bytes) + .long L(7bytes) - L(table_32bytes) + .long L(8bytes) - L(table_32bytes) + .long L(9bytes) - L(table_32bytes) + .long L(10bytes) - L(table_32bytes) + .long L(11bytes) - L(table_32bytes) + .long L(12bytes) - L(table_32bytes) + .long L(13bytes) - L(table_32bytes) + .long L(14bytes) - L(table_32bytes) + .long L(15bytes) - L(table_32bytes) + .long L(16bytes) - L(table_32bytes) + .long L(17bytes) - L(table_32bytes) + .long L(18bytes) - L(table_32bytes) + .long L(19bytes) - L(table_32bytes) + .long L(20bytes) - L(table_32bytes) + .long L(21bytes) - L(table_32bytes) + .long L(22bytes) - L(table_32bytes) + .long L(23bytes) - L(table_32bytes) + .long L(24bytes) - L(table_32bytes) + .long L(25bytes) - L(table_32bytes) + .long L(26bytes) - L(table_32bytes) + .long L(27bytes) - L(table_32bytes) + .long L(28bytes) - L(table_32bytes) + .long L(29bytes) - L(table_32bytes) + .long L(30bytes) - L(table_32bytes) + .long L(31bytes) - L(table_32bytes) #undef bcmp diff --git a/sysdeps/i386/ldbl2mpn.c b/sysdeps/i386/ldbl2mpn.c index 01be777270..bf4e4ff43f 100644 --- a/sysdeps/i386/ldbl2mpn.c +++ b/sysdeps/i386/ldbl2mpn.c @@ -1,4 +1,4 @@ -/* Copyright (C) 1995, 1996, 1997, 2000, 2007 Free Software Foundation, Inc. +/* Copyright (C) 1995, 1996, 1997, 2000 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -19,7 +19,7 @@ #include "gmp.h" #include "gmp-impl.h" #include "longlong.h" -#include <ieee754.h> +#include "ieee754.h" #include <float.h> #include <stdlib.h> @@ -46,7 +46,7 @@ __mpn_extract_long_double (mp_ptr res_ptr, mp_size_t size, #elif BITS_PER_MP_LIMB == 64 /* Hopefully the compiler will combine the two bitfield extracts and this composition into just the original quadword extract. */ - res_ptr[0] = ((mp_limb_t) u.ieee.mantissa0 << 32) | u.ieee.mantissa1; + res_ptr[0] = ((unsigned long int) u.ieee.mantissa0 << 32) | u.ieee.mantissa1; #define N 1 #else #error "mp_limb size " BITS_PER_MP_LIMB "not accounted for" @@ -109,13 +109,6 @@ __mpn_extract_long_double (mp_ptr res_ptr, mp_size_t size, } } } - else if (u.ieee.exponent < 0x7fff -#if N == 2 - && res_ptr[0] == 0 -#endif - && res_ptr[N - 1] == 0) - /* Pseudo zero. */ - *expt = 0; return N; } diff --git a/sysdeps/i386/soft-fp/sfp-machine.h b/sysdeps/i386/soft-fp/sfp-machine.h deleted file mode 100644 index ed71ae418a..0000000000 --- a/sysdeps/i386/soft-fp/sfp-machine.h +++ /dev/null @@ -1,89 +0,0 @@ -#define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long - -#define __FP_FRAC_ADD_2(rh, rl, xh, xl, yh, yl) \ - __asm__("addl %5,%1; adcl %3,%0" \ - : "=r"(rh), "=r"(rl) \ - : "%0"(xh), "g"(yh), "%1"(xl), "g"(yl) \ - : "cc") - -#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ - do { \ - __asm__ volatile("addl %5,%1; adcl %3,%0" \ - : "=r"(r1), "=r"(r0) \ - : "%0"(x1), "g"(y1), "%1"(x0), "g"(y0) \ - : "cc"); \ - __asm__ volatile("adcl %5,%1; adcl %3,%0" \ - : "=r"(r3), "=r"(r2) \ - : "%0"(x3), "g"(y3), "%1"(x2), "g"(y2) \ - : "cc"); \ - } while (0) - -#define __FP_FRAC_SUB_2(rh, rl, xh, xl, yh, yl) \ - __asm__("subl %5,%1; sbbl %4,%0" \ - : "=r"(rh), "=r"(rl) \ - : "0"(xh), "1"(xl), "g"(yh), "g"(yl) \ - : "cc") - -#define __FP_CLZ(r, x) \ - do { \ - __asm__("bsrl %1,%0" : "=r"(r) : "g"(x) : "cc"); \ - r ^= 31; \ - } while (0) - -#define _i386_mul_32_64(rh, rl, x, y) \ - __asm__("mull %2" : "=d"(rh), "=a"(rl) : "%g"(x), "1"(y) : "cc") - -#define _i386_div_64_32(q, r, nh, nl, d) \ - __asm__ ("divl %4" : "=a"(q), "=d"(r) : "0"(nl), "1"(nh), "g"(d) : "cc") - - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,_i386_mul_32_64) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,_i386_mul_32_64) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) - -#define _FP_NANFRAC_S _FP_QNANBIT_S -#define _FP_NANFRAC_D _FP_QNANBIT_D, 0 -#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 -#define _FP_NANSIGN_S 1 -#define _FP_NANSIGN_D 1 -#define _FP_NANSIGN_Q 1 - -#define _FP_KEEPNANFRACP 1 -/* Here is something Intel misdesigned: the specs don't define - the case where we have two NaNs with same mantissas, but - different sign. Different operations pick up different NaNs. - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if (_FP_FRAC_GT_##wc(X, Y) \ - || (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - else \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -#define FP_EX_INVALID (1 << 0) -#define FP_EX_DENORM (1 << 1) -#define FP_EX_DIVZERO (1 << 2) -#define FP_EX_OVERFLOW (1 << 3) -#define FP_EX_UNDERFLOW (1 << 4) -#define FP_EX_INEXACT (1 << 5) - -#define FP_RND_NEAREST 0 -#define FP_RND_ZERO 3 -#define FP_RND_PINF 2 -#define FP_RND_MINF 1 diff --git a/sysdeps/i386/sysdep.h b/sysdeps/i386/sysdep.h index 2739cb00b3..e03a8e926d 100644 --- a/sysdeps/i386/sysdep.h +++ b/sysdeps/i386/sysdep.h @@ -1,5 +1,6 @@ /* Assembler macros for i386. - Copyright (C) 1991-93,95,96,98,2002,2003,2005 Free Software Foundation, Inc. + Copyright (C) 1991-93,95,96,98,2002,2003,2005,2006 + Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -132,15 +133,7 @@ lose: SYSCALL_PIC_SETUP \ cfi_adjust_cfa_offset (-4); \ addl $_GLOBAL_OFFSET_TABLE+[.-0b], %ebx; -# ifndef HAVE_HIDDEN -# define SETUP_PIC_REG(reg) \ - call 1f; \ - .subsection 1; \ -1:movl (%esp), %e##reg; \ - ret; \ - .previous -# else -# define SETUP_PIC_REG(reg) \ +# define SETUP_PIC_REG(reg) \ .ifndef __i686.get_pc_thunk.reg; \ .section .gnu.linkonce.t.__i686.get_pc_thunk.reg,"ax",@progbits; \ .globl __i686.get_pc_thunk.reg; \ @@ -153,7 +146,6 @@ __i686.get_pc_thunk.reg: \ .previous; \ .endif; \ call __i686.get_pc_thunk.reg -# endif # define LOAD_PIC_REG(reg) \ SETUP_PIC_REG(reg); addl $_GLOBAL_OFFSET_TABLE_, %e##reg |