diff options
Diffstat (limited to 'sysdeps/i386/i686/multiarch/strcmp.S')
-rw-r--r-- | sysdeps/i386/i686/multiarch/strcmp.S | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/sysdeps/i386/i686/multiarch/strcmp.S b/sysdeps/i386/i686/multiarch/strcmp.S index 7136d47e85..1838ea3ff5 100644 --- a/sysdeps/i386/i686/multiarch/strcmp.S +++ b/sysdeps/i386/i686/multiarch/strcmp.S @@ -1,5 +1,5 @@ /* Multiple versions of strcmp - Copyright (C) 2010 Free Software Foundation, Inc. + Copyright (C) 2010, 2011 Free Software Foundation, Inc. Contributed by Intel Corporation. This file is part of the GNU C Library. @@ -21,18 +21,30 @@ #include <sysdep.h> #include <init-arch.h> -#ifndef USE_AS_STRNCMP -# define STRCMP strcmp -# define __GI_STRCMP __GI_strcmp -# define __STRCMP_IA32 __strcmp_ia32 -# define __STRCMP_SSSE3 __strcmp_ssse3 -# define __STRCMP_SSE4_2 __strcmp_sse4_2 -#else +#ifdef USE_AS_STRNCMP # define STRCMP strncmp # define __GI_STRCMP __GI_strncmp # define __STRCMP_IA32 __strncmp_ia32 # define __STRCMP_SSSE3 __strncmp_ssse3 # define __STRCMP_SSE4_2 __strncmp_sse4_2 +#elif defined USE_AS_STRCASECMP_L +# define STRCMP __strcasecmp_l +# define __GI_STRCMP __GI_strcasecmp_l +# define __STRCMP_IA32 __strcasecmp_l_ia32 +# define __STRCMP_SSSE3 __strcasecmp_l_ssse3 +# define __STRCMP_SSE4_2 __strcasecmp_l_sse4_2 +#elif defined USE_AS_STRNCASECMP_L +# define STRCMP __strncasecmp_l +# define __GI_STRCMP __GI_strncasecmp_l +# define __STRCMP_IA32 __strncasecmp_l_ia32 +# define __STRCMP_SSSE3 __strncasecmp_l_ssse3 +# define __STRCMP_SSE4_2 __strncasecmp_l_sse4_2 +#else +# define STRCMP strcmp +# define __GI_STRCMP __GI_strcmp +# define __STRCMP_IA32 __strcmp_ia32 +# define __STRCMP_SSSE3 __strcmp_ssse3 +# define __STRCMP_SSE4_2 __strcmp_sse4_2 #endif /* Define multiple versions only for the definition in libc. Don't @@ -64,9 +76,12 @@ ENTRY(STRCMP) testl $bit_SSSE3, CPUID_OFFSET+index_SSSE3+__cpu_features@GOTOFF(%ebx) jz 2f leal __STRCMP_SSSE3@GOTOFF(%ebx), %eax +#if 0 + // XXX Temporarily testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx) jz 2f leal __STRCMP_SSE4_2@GOTOFF(%ebx), %eax +#endif 2: popl %ebx cfi_adjust_cfa_offset (-4) cfi_restore (ebx) @@ -83,9 +98,12 @@ ENTRY(STRCMP) testl $bit_SSSE3, CPUID_OFFSET+index_SSSE3+__cpu_features jz 2f leal __STRCMP_SSSE3, %eax +#if 0 + // XXX Temporarily testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features jz 2f leal __STRCMP_SSE4_2, %eax +#endif 2: ret END(STRCMP) # endif |