diff options
Diffstat (limited to 'sysdeps/arm/bits')
| -rw-r--r-- | sysdeps/arm/bits/atomic.h | 159 | ||||
| -rw-r--r-- | sysdeps/arm/bits/endian.h | 10 | ||||
| -rw-r--r-- | sysdeps/arm/bits/fenv.h | 82 | ||||
| -rw-r--r-- | sysdeps/arm/bits/link.h | 65 | ||||
| -rw-r--r-- | sysdeps/arm/bits/linkmap.h | 5 | ||||
| -rw-r--r-- | sysdeps/arm/bits/mathdef.h | 55 | ||||
| -rw-r--r-- | sysdeps/arm/bits/setjmp.h | 37 |
7 files changed, 413 insertions, 0 deletions
diff --git a/sysdeps/arm/bits/atomic.h b/sysdeps/arm/bits/atomic.h new file mode 100644 index 0000000000..c2d5be5703 --- /dev/null +++ b/sysdeps/arm/bits/atomic.h @@ -0,0 +1,159 @@ +/* Atomic operations. Pure ARM version. + Copyright (C) 2002-2014 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <http://www.gnu.org/licenses/>. */ + +#include <stdint.h> + +typedef int8_t atomic8_t; +typedef uint8_t uatomic8_t; +typedef int_fast8_t atomic_fast8_t; +typedef uint_fast8_t uatomic_fast8_t; + +typedef int32_t atomic32_t; +typedef uint32_t uatomic32_t; +typedef int_fast32_t atomic_fast32_t; +typedef uint_fast32_t uatomic_fast32_t; + +typedef intptr_t atomicptr_t; +typedef uintptr_t uatomicptr_t; +typedef intmax_t atomic_max_t; +typedef uintmax_t uatomic_max_t; + +void __arm_link_error (void); + +#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 +# define atomic_full_barrier() __sync_synchronize () +#else +# define atomic_full_barrier() __arm_assisted_full_barrier () +#endif + +/* An OS-specific bits/atomic.h file will define this macro if + the OS can provide something. If not, we'll fail to build + with a compiler that doesn't supply the operation. */ +#ifndef __arm_assisted_full_barrier +# define __arm_assisted_full_barrier() __arm_link_error() +#endif + +/* Use the atomic builtins provided by GCC in case the backend provides + a pattern to do this efficiently. */ +#if __GNUC_PREREQ (4, 7) && defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 + +# define atomic_exchange_acq(mem, value) \ + __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE) + +# define atomic_exchange_rel(mem, value) \ + __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE) + +/* Atomic exchange (without compare). */ + +# define __arch_exchange_8_int(mem, newval, model) \ + (__arm_link_error (), (typeof (*mem)) 0) + +# define __arch_exchange_16_int(mem, newval, model) \ + (__arm_link_error (), (typeof (*mem)) 0) + +# define __arch_exchange_32_int(mem, newval, model) \ + __atomic_exchange_n (mem, newval, model) + +# define __arch_exchange_64_int(mem, newval, model) \ + (__arm_link_error (), (typeof (*mem)) 0) + +/* Compare and exchange with "acquire" semantics, ie barrier after. */ + +# define atomic_compare_and_exchange_bool_acq(mem, new, old) \ + __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ + mem, new, old, __ATOMIC_ACQUIRE) + +# define atomic_compare_and_exchange_val_acq(mem, new, old) \ + __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ + mem, new, old, __ATOMIC_ACQUIRE) + +/* Compare and exchange with "release" semantics, ie barrier before. */ + +# define atomic_compare_and_exchange_bool_rel(mem, new, old) \ + __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ + mem, new, old, __ATOMIC_RELEASE) + +# define atomic_compare_and_exchange_val_rel(mem, new, old) \ + __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ + mem, new, old, __ATOMIC_RELEASE) + +/* Compare and exchange. + For all "bool" routines, we return FALSE if exchange succesful. */ + +# define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \ + ({__arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \ + ({__arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \ + ({ \ + typeof (*mem) __oldval = (oldval); \ + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ + model, __ATOMIC_RELAXED); \ + }) + +# define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \ + ({__arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \ + ({__arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \ + ({__arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \ + ({ \ + typeof (*mem) __oldval = (oldval); \ + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ + model, __ATOMIC_RELAXED); \ + __oldval; \ + }) + +# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ + ({__arm_link_error (); oldval; }) + +#elif defined __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 +/* Atomic compare and exchange. */ +# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + __sync_val_compare_and_swap ((mem), (oldval), (newval)) +#else +# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + __arm_assisted_compare_and_exchange_val_32_acq ((mem), (newval), (oldval)) +#endif + +#if !__GNUC_PREREQ (4, 7) || !defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) +/* We don't support atomic operations on any non-word types. + So make them link errors. */ +# define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \ + ({ __arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \ + ({ __arm_link_error (); oldval; }) + +# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ + ({ __arm_link_error (); oldval; }) +#endif + +/* An OS-specific bits/atomic.h file will define this macro if + the OS can provide something. If not, we'll fail to build + with a compiler that doesn't supply the operation. */ +#ifndef __arm_assisted_compare_and_exchange_val_32_acq +# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + ({ __arm_link_error (); oldval; }) +#endif diff --git a/sysdeps/arm/bits/endian.h b/sysdeps/arm/bits/endian.h new file mode 100644 index 0000000000..f49f6ab1c9 --- /dev/null +++ b/sysdeps/arm/bits/endian.h @@ -0,0 +1,10 @@ +#ifndef _ENDIAN_H +# error "Never use <bits/endian.h> directly; include <endian.h> instead." +#endif + +/* ARM can be either big or little endian. */ +#ifdef __ARMEB__ +#define __BYTE_ORDER __BIG_ENDIAN +#else +#define __BYTE_ORDER __LITTLE_ENDIAN +#endif diff --git a/sysdeps/arm/bits/fenv.h b/sysdeps/arm/bits/fenv.h new file mode 100644 index 0000000000..c7f5876c5c --- /dev/null +++ b/sysdeps/arm/bits/fenv.h @@ -0,0 +1,82 @@ +/* Copyright (C) 2004-2014 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _FENV_H +# error "Never use <bits/fenv.h> directly; include <fenv.h> instead." +#endif + +/* Define bits representing exceptions in the FPU status word. */ +enum + { + FE_INVALID = +#define FE_INVALID 1 + FE_INVALID, + FE_DIVBYZERO = +#define FE_DIVBYZERO 2 + FE_DIVBYZERO, + FE_OVERFLOW = +#define FE_OVERFLOW 4 + FE_OVERFLOW, + FE_UNDERFLOW = +#define FE_UNDERFLOW 8 + FE_UNDERFLOW, + FE_INEXACT = +#define FE_INEXACT 16 + FE_INEXACT, + }; + +/* Amount to shift by to convert an exception to a mask bit. */ +#define FE_EXCEPT_SHIFT 8 + +/* All supported exceptions. */ +#define FE_ALL_EXCEPT \ + (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT) + +/* VFP supports all of the four defined rounding modes. */ +enum + { + FE_TONEAREST = +#define FE_TONEAREST 0 + FE_TONEAREST, + FE_UPWARD = +#define FE_UPWARD 0x400000 + FE_UPWARD, + FE_DOWNWARD = +#define FE_DOWNWARD 0x800000 + FE_DOWNWARD, + FE_TOWARDZERO = +#define FE_TOWARDZERO 0xc00000 + FE_TOWARDZERO + }; + +/* Type representing exception flags. */ +typedef unsigned int fexcept_t; + +/* Type representing floating-point environment. */ +typedef struct + { + unsigned int __cw; + } +fenv_t; + +/* If the default argument is used we use this value. */ +#define FE_DFL_ENV ((const fenv_t *) -1l) + +#ifdef __USE_GNU +/* Floating-point environment where none of the exceptions are masked. */ +# define FE_NOMASK_ENV ((const fenv_t *) -2) +#endif diff --git a/sysdeps/arm/bits/link.h b/sysdeps/arm/bits/link.h new file mode 100644 index 0000000000..9412cf8800 --- /dev/null +++ b/sysdeps/arm/bits/link.h @@ -0,0 +1,65 @@ +/* Copyright (C) 2005-2014 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _LINK_H +# error "Never include <bits/link.h> directly; use <link.h> instead." +#endif + + +/* Registers for entry into PLT on ARM. */ +typedef struct La_arm_regs +{ + uint32_t lr_reg[4]; + uint32_t lr_sp; + uint32_t lr_lr; + /* Coprocessor registers used for argument passing. The data + stored here depends on the coprocessors available in the + system which are used for function calls in the current ABI. + VFP uses eight 64-bit registers, and iWMMXt uses ten. */ + uint32_t lr_coproc[42]; +} La_arm_regs; + +/* Return values for calls from PLT on ARM. */ +typedef struct La_arm_retval +{ + /* Up to four integer registers can be used for a return value in + some ABIs (APCS complex long double). */ + uint32_t lrv_reg[4]; + + /* Any coprocessor registers which might be used to return values + in the current ABI. */ + uint32_t lrv_coproc[12]; +} La_arm_retval; + + +__BEGIN_DECLS + +extern Elf32_Addr la_arm_gnu_pltenter (Elf32_Sym *__sym, unsigned int __ndx, + uintptr_t *__refcook, + uintptr_t *__defcook, + La_arm_regs *__regs, + unsigned int *__flags, + const char *__symname, + long int *__framesizep); +extern unsigned int la_arm_gnu_pltexit (Elf32_Sym *__sym, unsigned int __ndx, + uintptr_t *__refcook, + uintptr_t *__defcook, + const La_arm_regs *__inregs, + La_arm_retval *__outregs, + const char *__symname); + +__END_DECLS diff --git a/sysdeps/arm/bits/linkmap.h b/sysdeps/arm/bits/linkmap.h new file mode 100644 index 0000000000..7c2b4a6da8 --- /dev/null +++ b/sysdeps/arm/bits/linkmap.h @@ -0,0 +1,5 @@ +struct link_map_machine + { + Elf32_Addr plt; /* Address of .plt */ + void *tlsdesc_table; /* Address of TLS descriptor hash table. */ + }; diff --git a/sysdeps/arm/bits/mathdef.h b/sysdeps/arm/bits/mathdef.h new file mode 100644 index 0000000000..be727e5b8d --- /dev/null +++ b/sysdeps/arm/bits/mathdef.h @@ -0,0 +1,55 @@ +/* Copyright (C) 1999-2014 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <http://www.gnu.org/licenses/>. */ + +#if !defined _MATH_H && !defined _COMPLEX_H +# error "Never use <bits/mathdef.h> directly; include <math.h> instead" +#endif + +#if defined __USE_ISOC99 && defined _MATH_H && !defined _MATH_H_MATHDEF +# define _MATH_H_MATHDEF 1 + +/* GCC does not promote `float' values to `double'. */ +typedef float float_t; /* `float' expressions are evaluated as + `float'. */ +typedef double double_t; /* `double' expressions are evaluated as + `double'. */ + +/* The values returned by `ilogb' for 0 and NaN respectively. */ +# define FP_ILOGB0 (-2147483647) +# define FP_ILOGBNAN (2147483647) + +/* The GCC 4.6 compiler will define __FP_FAST_FMA{,F,L} if the fma{,f,l} + builtins are supported. */ +# if __FP_FAST_FMA +# define FP_FAST_FMA 1 +# endif + +# if __FP_FAST_FMAF +# define FP_FAST_FMAF 1 +# endif + +# if __FP_FAST_FMAL +# define FP_FAST_FMAL 1 +# endif + +#endif /* ISO C99 */ + +#ifndef __NO_LONG_DOUBLE_MATH +/* Signal that we do not really have a `long double'. This disables the + declaration of all the `long double' function variants. */ +# define __NO_LONG_DOUBLE_MATH 1 +#endif diff --git a/sysdeps/arm/bits/setjmp.h b/sysdeps/arm/bits/setjmp.h new file mode 100644 index 0000000000..41423b2c3b --- /dev/null +++ b/sysdeps/arm/bits/setjmp.h @@ -0,0 +1,37 @@ +/* Copyright (C) 2004-2014 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <http://www.gnu.org/licenses/>. */ + +/* Define the machine-dependent type `jmp_buf'. ARM EABI version. */ + +#ifndef _BITS_SETJMP_H +#define _BITS_SETJMP_H 1 + +#if !defined _SETJMP_H && !defined _PTHREAD_H +# error "Never include <bits/setjmp.h> directly; use <setjmp.h> instead." +#endif + +#ifndef __ASSEMBLER__ +/* The exact set of registers saved may depend on the particular core + in use, as some coprocessor registers may need to be saved. The C + Library ABI requires that the buffer be 8-byte aligned, and + recommends that the buffer contain 64 words. The first 27 words + are occupied by v1-v6, sl, fp, sp, pc, and d8-d15. (Note that + d8-15 require 17 words, due to the use of fstmx.) */ +typedef int __jmp_buf[64] __attribute__((__aligned__ (8))); +#endif + +#endif |