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Diffstat (limited to 'sysdeps/aarch64/fpu/fesetenv.c')
-rw-r--r--sysdeps/aarch64/fpu/fesetenv.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/fesetenv.c b/sysdeps/aarch64/fpu/fesetenv.c
index 443c705d22..a2434e37b0 100644
--- a/sysdeps/aarch64/fpu/fesetenv.c
+++ b/sysdeps/aarch64/fpu/fesetenv.c
@@ -24,6 +24,7 @@ fesetenv (const fenv_t *envp)
 {
   fpu_control_t fpcr;
   fpu_fpsr_t fpsr;
+  fpu_control_t updated_fpcr;
 
   _FPU_GETCW (fpcr);
   _FPU_GETFPSR (fpsr);
@@ -51,6 +52,15 @@ fesetenv (const fenv_t *envp)
 
   _FPU_SETCW (fpcr);
 
+  /* Trapping exceptions are optional in AArch64 the relevant enable
+     bits in FPCR are RES0 hence the absence of support can be
+     detected by reading back the FPCR and comparing with the required
+     value.  */
+
+  _FPU_GETCW (updated_fpcr);
+  if ((updated_fpcr & fpcr) != fpcr)
+    return 1;
+
   return 0;
 }