11 files changed, 15 insertions, 15 deletions
diff --git a/ports/sysdeps/hppa/fpu/bits/fenv.h b/ports/sysdeps/hppa/fpu/bits/fenv.h
index 7fd14f12de..edbc9b166d 100644
--- a/ports/sysdeps/hppa/fpu/bits/fenv.h
+++ b/ports/sysdeps/hppa/fpu/bits/fenv.h
@@ -74,7 +74,7 @@ typedef unsigned int fexcept_t;
    userspace. This structure is also not correctly aligned ever, in
    an ABI error we left out __aligned(8) and subsequently all of our
    fenv functions must accept unaligned input, align the input, and
-   then use assembly to store fr0. This is a performance hit, but 
+   then use assembly to store fr0. This is a performance hit, but
    means the ABI is stable. */
 typedef struct
 {
diff --git a/ports/sysdeps/hppa/fpu/fedisblxcpt.c b/ports/sysdeps/hppa/fpu/fedisblxcpt.c
index de03bc9425..6d80b02099 100644
--- a/ports/sysdeps/hppa/fpu/fedisblxcpt.c
+++ b/ports/sysdeps/hppa/fpu/fedisblxcpt.c
@@ -22,7 +22,7 @@
 int
 fedisableexcept (int excepts)
 {
-  union { unsigned long long l; unsigned int sw[2]; } s; 
+  union { unsigned long long l; unsigned int sw[2]; } s;
   unsigned int old_exc;
 
   /* Get the current status word. */
diff --git a/ports/sysdeps/hppa/fpu/fegetenv.c b/ports/sysdeps/hppa/fpu/fegetenv.c
index 0b1d4a8971..590a1177e9 100644
--- a/ports/sysdeps/hppa/fpu/fegetenv.c
+++ b/ports/sysdeps/hppa/fpu/fegetenv.c
@@ -24,7 +24,7 @@ int
 fegetenv (fenv_t *envp)
 {
   unsigned long long buf[4], *bufptr = buf;
-  
+
   __asm__ (
 	   "fstd,ma %%fr0,8(%1)	\n\t"
 	   "fldd -8(%1),%%fr0	\n\t"
diff --git a/ports/sysdeps/hppa/fpu/fegetexcept.c b/ports/sysdeps/hppa/fpu/fegetexcept.c
index 102a723cb0..181cdb520e 100644
--- a/ports/sysdeps/hppa/fpu/fegetexcept.c
+++ b/ports/sysdeps/hppa/fpu/fegetexcept.c
@@ -25,7 +25,7 @@ fegetexcept (void)
   union { unsigned long long l; unsigned int sw[2] } s;
 
   /* Get the current status word. */
-  __asm__ ("fstd %%fr0,0(%1)	\n\t" 
+  __asm__ ("fstd %%fr0,0(%1)	\n\t"
            "fldd 0(%1),%%fr0	\n\t"
       	   : "=m" (s.l) : "r" (&s.l) : "%r0");
 
diff --git a/ports/sysdeps/hppa/fpu/feholdexcpt.c b/ports/sysdeps/hppa/fpu/feholdexcpt.c
index 5129f89744..c351fa4e16 100644
--- a/ports/sysdeps/hppa/fpu/feholdexcpt.c
+++ b/ports/sysdeps/hppa/fpu/feholdexcpt.c
@@ -40,7 +40,7 @@ feholdexcept (fenv_t *envp)
   /* Now clear all flags  */
   clear.env.__status_word &= ~(FE_ALL_EXCEPT << 27);
 
-  /* Load the new environment. Note: fr0 must load last to enable T-bit 
+  /* Load the new environment. Note: fr0 must load last to enable T-bit
      Thus we start bufptr at the end and work backwards */
   bufptr = (unsigned long long *)((unsigned int)(clear.buf) + sizeof(unsigned int)*4);
   __asm__ (
diff --git a/ports/sysdeps/hppa/fpu/fesetenv.c b/ports/sysdeps/hppa/fpu/fesetenv.c
index fd2794200a..e845b2c8dd 100644
--- a/ports/sysdeps/hppa/fpu/fesetenv.c
+++ b/ports/sysdeps/hppa/fpu/fesetenv.c
@@ -49,7 +49,7 @@ fesetenv (const fenv_t *envp)
 				  | FE_DOWNWARD
 				  | (FE_ALL_EXCEPT << 27)));
 
-  /* Load the new environment. We use bufptr again since the 
+  /* Load the new environment. We use bufptr again since the
      initial asm has modified the value of the register and here
      we take advantage of that to load in reverse order so fr0
      is loaded last and T-Bit is enabled. */
diff --git a/ports/sysdeps/hppa/fpu/fesetround.c b/ports/sysdeps/hppa/fpu/fesetround.c
index 8516ff0a7a..89d68814d1 100644
--- a/ports/sysdeps/hppa/fpu/fesetround.c
+++ b/ports/sysdeps/hppa/fpu/fesetround.c
@@ -27,7 +27,7 @@ fesetround (int round)
   if (round & ~FE_DOWNWARD)
     /* round is not a valid rounding mode. */
     return 1;
-  
+
   /* Get the current status word. */
   __asm__ ("fstd %%fr0,0(%1)" : "=m" (s.l) : "r" (&s.l) : "%r0");
   s.sw[0] &= ~FE_DOWNWARD;
diff --git a/ports/sysdeps/hppa/fpu/feupdateenv.c b/ports/sysdeps/hppa/fpu/feupdateenv.c
index 20573147cb..ce60dfe7f8 100644
--- a/ports/sysdeps/hppa/fpu/feupdateenv.c
+++ b/ports/sysdeps/hppa/fpu/feupdateenv.c
@@ -26,8 +26,8 @@ feupdateenv (const fenv_t *envp)
   union { unsigned long long l; unsigned int sw[2]; } s;
   fenv_t temp;
   /* Get the current exception status */
-  __asm__ ("fstd %%fr0,0(%1)	\n\t" 
-           "fldd 0(%1),%%fr0	\n\t" 
+  __asm__ ("fstd %%fr0,0(%1)	\n\t"
+           "fldd 0(%1),%%fr0	\n\t"
 	   : "=m" (s.l) : "r" (&s.l));
   memcpy(&temp, envp, sizeof(fenv_t));
   /* Currently raised exceptions not cleared */
diff --git a/ports/sysdeps/hppa/fpu/fgetexcptflg.c b/ports/sysdeps/hppa/fpu/fgetexcptflg.c
index 87f8db80db..580951e4d1 100644
--- a/ports/sysdeps/hppa/fpu/fgetexcptflg.c
+++ b/ports/sysdeps/hppa/fpu/fgetexcptflg.c
@@ -25,8 +25,8 @@ fegetexceptflag (fexcept_t *flagp, int excepts)
   union { unsigned long long l; unsigned int sw[2]; } s;
 
   /* Get the current status word. */
-  __asm__ ("fstd %%fr0,0(%1)	\n\t" 
-           "fldd 0(%1),%%fr0	\n\t" 
+  __asm__ ("fstd %%fr0,0(%1)	\n\t"
+           "fldd 0(%1),%%fr0	\n\t"
       	   : "=m" (s.l) : "r" (&s.l) : "%r0");
 
   *flagp = (s.sw[0] >> 27) & excepts & FE_ALL_EXCEPT;
diff --git a/ports/sysdeps/hppa/fpu/fraiseexcpt.c b/ports/sysdeps/hppa/fpu/fraiseexcpt.c
index 204695c22a..0b55d34390 100644
--- a/ports/sysdeps/hppa/fpu/fraiseexcpt.c
+++ b/ports/sysdeps/hppa/fpu/fraiseexcpt.c
@@ -21,7 +21,7 @@
 #include <float.h>
 #include <math.h>
 
-/* Please see section 10, 
+/* Please see section 10,
    page 10-5 "Delayed Trapping" in the PA-RISC 2.0 Architecture manual */
 
 int
@@ -38,7 +38,7 @@ feraiseexcept (int excepts)
      occur. */
 
   /* We use "fldd 0(%%sr0,%%sp),%0" to flush the delayed exception */
-	
+
   /* First: Invalid exception.  */
   if (excepts & FE_INVALID)
     {
diff --git a/ports/sysdeps/hppa/fpu/ftestexcept.c b/ports/sysdeps/hppa/fpu/ftestexcept.c
index f438fa5e37..bf57879edd 100644
--- a/ports/sysdeps/hppa/fpu/ftestexcept.c
+++ b/ports/sysdeps/hppa/fpu/ftestexcept.c
@@ -25,8 +25,8 @@ fetestexcept (int excepts)
   union { unsigned long long l; unsigned int sw[2] } s;
 
   /* Get the current status word. */
-  __asm__ ("fstd %%fr0,0(%1)	\n\t" 
-           "fldd 0(%1),%%fr0	\n\t" 
+  __asm__ ("fstd %%fr0,0(%1)	\n\t"
+           "fldd 0(%1),%%fr0	\n\t"
       	   : "=m" (s.l) : "r" (&s.l));
 
   return (s.sw[0] >> 27) & excepts & FE_ALL_EXCEPT;