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-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/Makefile22
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/addmul_1.S81
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/atomic-machine.h108
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/backtrace.h7
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/bzero.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/dotmul.S17
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile14
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S30
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S29
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-vis3.S26
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-vis3.S26
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-vis3.c25
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c33
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-vis3.c24
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c34
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-vis3.S31
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c14
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-vis3.S28
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c14
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-vis3.S58
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S24
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-vis3.S54
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S17
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S66
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S19
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S62
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-vis3.S55
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S19
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-vis3.S51
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat-vis3.S49
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat-vis3.S47
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat.S12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_fabs.S28
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_isnan.S40
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S72
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S62
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S62
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S73
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S65
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S69
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S59
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrt_compat.S51
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrtf_compat.S50
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/hp-timing.h36
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memchr.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcmp.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcpy.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memset.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/mul_1.S70
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile12
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/ifunc-impl-list.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-block.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-crop.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara1.S2
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara2.S2
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara4.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra3.S2
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara1.S2
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara4.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memcpy.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memset.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-block.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-crop.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-block.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-crop.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_barrier_wait.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_init.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_lock.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_trylock.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_unlock.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rawmemchr.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rem.S22
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memcpy.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memset.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sdiv.S20
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_post.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpcpy.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpncpy.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcat.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strchr.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcmp.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcpy.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcspn.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strlen.S1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncmp.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncpy.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strpbrk.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strrchr.c1
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strspn.S4
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/submul_1.S82
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/udiv.S18
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/umul.S17
-rw-r--r--REORG.TODO/sysdeps/sparc/sparc32/sparcv9/urem.S19
104 files changed, 2211 insertions, 0 deletions
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/Makefile b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/Makefile
new file mode 100644
index 0000000000..526673e7b4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/Makefile
@@ -0,0 +1,22 @@
+sysdep-CFLAGS += -mcpu=ultrasparc -Wa,-Av9a -mvis
+
+ifeq ($(have-as-vis3),yes)
+ASFLAGS-.o += -Wa,-Av9d
+ASFLAGS-.os += -Wa,-Av9d
+ASFLAGS-.op += -Wa,-Av9d
+ASFLAGS-.oS += -Wa,-Av9d
+else
+ASFLAGS-.o += -Wa,-Av9a
+ASFLAGS-.os += -Wa,-Av9a
+ASFLAGS-.op += -Wa,-Av9a
+ASFLAGS-.oS += -Wa,-Av9a
+endif
+
+# nscd uses atomic_spin_nop which in turn requires cpu_relax
+ifeq ($(subdir),nscd)
+routines += cpu_relax
+endif
+
+ifeq ($(subdir), nptl)
+libpthread-routines += cpu_relax
+endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/addmul_1.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/addmul_1.S
new file mode 100644
index 0000000000..7d3114a846
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/addmul_1.S
@@ -0,0 +1,81 @@
+! SPARC v9 32-bit __mpn_addmul_1 -- Multiply a limb vector with a limb
+! and add the result to a second limb vector.
+!
+! Copyright (C) 2013-2017 Free Software Foundation, Inc.
+! This file is part of the GNU C Library.
+! Contributed by David S. Miller <davem@davemloft.net>
+!
+! The GNU C Library is free software; you can redistribute it and/or
+! modify it under the terms of the GNU Lesser General Public
+! License as published by the Free Software Foundation; either
+! version 2.1 of the License, or (at your option) any later version.
+!
+! The GNU C Library is distributed in the hope that it will be useful,
+! but WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+! Lesser General Public License for more details.
+!
+! You should have received a copy of the GNU Lesser General Public
+! License along with the GNU C Library; if not, see
+! <http://www.gnu.org/licenses/>.
+
+#include <sysdep.h>
+
+#define res_ptr	%i0
+#define s1_ptr	%i1
+#define sz_arg	%i2
+#define s2l_arg	%i3
+#define sz	%o4
+#define carry	%o5
+#define s2_limb	%g1
+#define tmp1	%l0
+#define tmp2	%l1
+#define tmp3	%l2
+#define tmp4	%l3
+#define tmp64_1	%g3
+#define tmp64_2	%o3
+
+ENTRY(__mpn_addmul_1)
+	save	%sp, -96, %sp
+	srl	sz_arg, 0, sz
+	srl	s2l_arg, 0, s2_limb
+	subcc	sz, 1, sz
+	be,pn	%icc, .Lfinal_limb
+	 clr	carry
+
+.Lloop:
+	lduw	[s1_ptr  + 0x00], tmp1
+	lduw	[res_ptr + 0x00], tmp3
+	lduw	[s1_ptr  + 0x04], tmp2
+	lduw	[res_ptr + 0x04], tmp4
+	mulx	tmp1, s2_limb, tmp64_1
+	add	s1_ptr, 8, s1_ptr
+	mulx	tmp2, s2_limb, tmp64_2
+	sub	sz, 2, sz
+	add	res_ptr, 8, res_ptr
+	add	tmp3, tmp64_1, tmp64_1
+	add	carry, tmp64_1, tmp64_1
+	stw	tmp64_1, [res_ptr - 0x08]
+	srlx	tmp64_1, 32, carry
+	add	tmp4, tmp64_2, tmp64_2
+	add	carry, tmp64_2, tmp64_2
+	stw	tmp64_2, [res_ptr - 0x04]
+	brgz	sz, .Lloop
+	 srlx	tmp64_2, 32, carry
+
+	brlz,pt	sz, .Lfinish
+	 nop
+
+.Lfinal_limb:
+	lduw	[s1_ptr + 0x00], tmp1
+	lduw	[res_ptr + 0x00], tmp3
+	mulx	tmp1, s2_limb, tmp64_1
+	add	tmp3, tmp64_1, tmp64_1
+	add	carry, tmp64_1, tmp64_1
+	stw	tmp64_1, [res_ptr + 0x00]
+	srlx	tmp64_1, 32, carry
+
+.Lfinish:
+	jmpl	%i7 + 0x8, %g0
+	 restore carry, 0, %o0
+END(__mpn_addmul_1)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/atomic-machine.h b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/atomic-machine.h
new file mode 100644
index 0000000000..2b36dfc94d
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/atomic-machine.h
@@ -0,0 +1,108 @@
+/* Atomic operations.  sparcv9 version.
+   Copyright (C) 2003-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Jakub Jelinek <jakub@redhat.com>, 2003.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdint.h>
+
+typedef int8_t atomic8_t;
+typedef uint8_t uatomic8_t;
+typedef int_fast8_t atomic_fast8_t;
+typedef uint_fast8_t uatomic_fast8_t;
+
+typedef int16_t atomic16_t;
+typedef uint16_t uatomic16_t;
+typedef int_fast16_t atomic_fast16_t;
+typedef uint_fast16_t uatomic_fast16_t;
+
+typedef int32_t atomic32_t;
+typedef uint32_t uatomic32_t;
+typedef int_fast32_t atomic_fast32_t;
+typedef uint_fast32_t uatomic_fast32_t;
+
+typedef int64_t atomic64_t;
+typedef uint64_t uatomic64_t;
+typedef int_fast64_t atomic_fast64_t;
+typedef uint_fast64_t uatomic_fast64_t;
+
+typedef intptr_t atomicptr_t;
+typedef uintptr_t uatomicptr_t;
+typedef intmax_t atomic_max_t;
+typedef uintmax_t uatomic_max_t;
+
+#define __HAVE_64B_ATOMICS 0
+#define USE_ATOMIC_COMPILER_BUILTINS 0
+
+/* XXX Is this actually correct?  */
+#define ATOMIC_EXCHANGE_USES_CAS 0
+
+
+#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
+  (abort (), (__typeof (*mem)) 0)
+
+#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
+  (abort (), (__typeof (*mem)) 0)
+
+#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
+({									      \
+  __typeof (*(mem)) __acev_tmp;						      \
+  __typeof (mem) __acev_mem = (mem);					      \
+  if (__builtin_constant_p (oldval) && (oldval) == 0)			      \
+    __asm __volatile ("cas [%3], %%g0, %0"				      \
+		      : "=r" (__acev_tmp), "=m" (*__acev_mem)		      \
+		      : "m" (*__acev_mem), "r" (__acev_mem),		      \
+		        "0" (newval) : "memory");			      \
+  else									      \
+    __asm __volatile ("cas [%4], %2, %0"				      \
+		      : "=r" (__acev_tmp), "=m" (*__acev_mem)		      \
+		      : "r" (oldval), "m" (*__acev_mem), "r" (__acev_mem),    \
+		        "0" (newval) : "memory");			      \
+  __acev_tmp; })
+
+/* This can be implemented if needed.  */
+#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
+  (abort (), (__typeof (*mem)) 0)
+
+#define atomic_exchange_acq(mem, newvalue) \
+  ({ __typeof (*(mem)) __oldval;					      \
+     __typeof (mem) __memp = (mem);					      \
+     __typeof (*(mem)) __value = (newvalue);				      \
+									      \
+     if (sizeof (*(mem)) == 4)						      \
+       __asm ("swap %0, %1"						      \
+	      : "=m" (*__memp), "=r" (__oldval)				      \
+	      : "m" (*__memp), "1" (__value) : "memory");		      \
+     else								      \
+       abort ();							      \
+     __oldval; })
+
+#define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
+  atomic_compare_and_exchange_val_acq (mem, newval, oldval)
+
+#define atomic_exchange_24_rel(mem, newval) \
+  atomic_exchange_rel (mem, newval)
+
+#define atomic_full_barrier() \
+  __asm __volatile ("membar #LoadLoad | #LoadStore"			      \
+			  " | #StoreLoad | #StoreStore" : : : "memory")
+#define atomic_read_barrier() \
+  __asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
+#define atomic_write_barrier() \
+  __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")
+
+extern void __cpu_relax (void);
+#define atomic_spin_nop() __cpu_relax ()
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/backtrace.h b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/backtrace.h
new file mode 100644
index 0000000000..8d6c756717
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/backtrace.h
@@ -0,0 +1,7 @@
+/* Private macros for guiding the backtrace implementation, sparc32 v9
+   version.  */
+
+#define backtrace_flush_register_windows() \
+	asm volatile ("flushw")
+
+#define BACKTRACE_STACK_BIAS	0
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/bzero.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/bzero.c
new file mode 100644
index 0000000000..37f0f6f993
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/bzero.c
@@ -0,0 +1 @@
+/* bzero is in memset.S */
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S
new file mode 100644
index 0000000000..41a5e72b25
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/cpu_relax.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/dotmul.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/dotmul.S
new file mode 100644
index 0000000000..811cf1e89e
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/dotmul.S
@@ -0,0 +1,17 @@
+/*
+ * Sparc v9 has multiply.
+ */
+
+#include <sysdep.h>
+
+	.text
+	.align		32
+ENTRY(.mul)
+
+	sra		%o0, 0, %o0
+	sra		%o1, 0, %o1
+	mulx		%o0, %o1, %o0
+	retl
+	 srax		%o0, 32, %o1
+
+END(.mul)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
new file mode 100644
index 0000000000..322e300097
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -0,0 +1,14 @@
+ifeq ($(subdir),math)
+ifeq ($(have-as-vis3),yes)
+libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \
+			s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
+			s_rintf-vis3 s_rint-vis3 \
+			w_sqrt_compat-vis3 w_sqrtf_compat-vis3 \
+			s_fmaf-vis3 s_fma-vis3 s_nearbyint-vis3 \
+			s_nearbyintf-vis3 s_fdimf-vis3 s_fdim-vis3
+sysdep_routines += s_copysignf-vis3 s_copysign-vis3
+
+CFLAGS-s_fdimf-vis3.c += -Wa,-Av9d -mvis3
+CFLAGS-s_fdim-vis3.c += -Wa,-Av9d -mvis3
+endif
+endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S
new file mode 100644
index 0000000000..aa8b6169a1
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S
@@ -0,0 +1,30 @@
+/* copysign function, sparc32 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__copysign_vis3)
+	sethi	%hi(0x80000000), %g1
+	and	%o2, %g1, %o4
+	andn	%o0, %g1, %o0
+	or	%o0, %o4, %o0
+	movwtos %o0, %f0
+	retl
+	 movwtos %o1, %f1
+END (__copysign_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S
new file mode 100644
index 0000000000..cdd98c00f4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(copysign)
+
+weak_alias (__copysign, copysign)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __copysign __copysign_generic
+
+#include "../../../fpu/s_copysign.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S
new file mode 100644
index 0000000000..0f702b32aa
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S
@@ -0,0 +1,29 @@
+/* float copysign function, sparc32 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__copysignf_vis3)
+	sethi	%hi(0x80000000), %g1
+	and	%o1, %g1, %o4
+	andn	%o0, %g1, %o0
+	or	%o0, %o4, %o0
+	retl
+	 movwtos %o0, %f0
+END (__copysignf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S
new file mode 100644
index 0000000000..cd409550de
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(copysignf)
+
+weak_alias (__copysignf, copysignf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __copysignf __copysignf_generic
+
+#include "../../../fpu/s_copysignf.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-vis3.S
new file mode 100644
index 0000000000..21078eb00f
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-vis3.S
@@ -0,0 +1,26 @@
+/* Float absolute value, sparc32+v9 vis3 version.
+   Copyright (C) 2011-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__fabs_vis3)
+	movwtos	%o0, %f0
+	movwtos	%o1, %f1
+	retl
+	 fabsd	%f0, %f0
+END (__fabs_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S
new file mode 100644
index 0000000000..86c63989a4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(fabs)
+
+weak_alias (__fabs, fabs)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __fabs __fabs_generic
+
+#include "../s_fabs.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-vis3.S
new file mode 100644
index 0000000000..82816a185e
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-vis3.S
@@ -0,0 +1,26 @@
+/* Float absolute value, sparc32 vis3 version.
+   Copyright (C) 2006-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Jakub Jelinek <jakub@redhat.com>, 2006.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__fabsf_vis3)
+	movwtos	%o0, %f0
+	retl
+	 fabss	%f0, %f0
+END (__fabsf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S
new file mode 100644
index 0000000000..0f2e11e01f
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(fabsf)
+
+weak_alias (__fabsf, fabsf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __fabsf __fabsf_generic
+
+#include "../../../fpu/s_fabsf.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-vis3.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-vis3.c
new file mode 100644
index 0000000000..8c3666da7a
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim-vis3.c
@@ -0,0 +1,25 @@
+/* Compute positive difference, sparc 32-bit+v9+vis3.
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <math.h>
+
+#define __fdim __fdim_vis3
+#define declare_mgen_alias(t, f)
+#define M_LIBM_NEED_COMPAT(f) 0
+
+#include <math/s_fdim.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c
new file mode 100644
index 0000000000..417b8690d6
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdim.c
@@ -0,0 +1,33 @@
+/* Compute positive difference, sparc 32-bit.
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_AS_VIS3_SUPPORT
+# include <sparc-ifunc.h>
+# include <math.h>
+
+extern double __fdim_vis3 (double, double);
+extern double __fdim_generic (double, double);
+
+sparc_libm_ifunc(__fdim, hwcap & HWCAP_SPARC_VIS3 ? __fdim_vis3 : __fdim_generic);
+weak_alias (__fdim, fdim)
+
+# define __fdim __fdim_generic
+# define declare_mgen_alias(t, f)
+#endif
+
+#include <math/s_fdim.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-vis3.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-vis3.c
new file mode 100644
index 0000000000..a8ae7fa3d9
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf-vis3.c
@@ -0,0 +1,24 @@
+/* Float compute positive difference, sparc 32-bit+v9+vis3.
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <math.h>
+
+#define __fdimf __fdimf_vis3
+#define declare_mgen_alias(t, f)
+
+#include <math/s_fdimf.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c
new file mode 100644
index 0000000000..cf1dc9ec6c
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fdimf.c
@@ -0,0 +1,34 @@
+/* Float compute positive difference, sparc 32-bit.
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_AS_VIS3_SUPPORT
+# include <sparc-ifunc.h>
+# include <math.h>
+
+extern float __fdimf_vis3 (float, float);
+extern float __fdimf_generic (float, float);
+
+sparc_libm_ifunc(__fdimf, hwcap & HWCAP_SPARC_VIS3 ? __fdimf_vis3 : __fdimf_generic);
+weak_alias (__fdimf, fdimf)
+
+# define __fdimf __fdimf_generic
+# define declare_mgen_alias(t, f)
+
+#endif
+
+#include <math/s_fdimf.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-vis3.S
new file mode 100644
index 0000000000..2e7d2111a3
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma-vis3.S
@@ -0,0 +1,31 @@
+/* fma function, sparc32 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__fma_vis3)
+	movwtos	%o0, %f0
+	movwtos	%o1, %f1
+	movwtos	%o2, %f2
+	movwtos	%o3, %f3
+	movwtos	%o4, %f4
+	movwtos	%o5, %f5
+	retl
+	 fmaddd	%f0, %f2, %f4, %f0
+END (__fma_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c
new file mode 100644
index 0000000000..3f2f1622c8
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fma.c
@@ -0,0 +1,14 @@
+#ifdef HAVE_AS_VIS3_SUPPORT
+# include <sparc-ifunc.h>
+# include <math.h>
+
+extern double __fma_vis3 (double, double, double);
+extern double __fma_generic (double, double, double);
+
+sparc_libm_ifunc(__fma, hwcap & HWCAP_SPARC_FMAF ? __fma_vis3 : __fma_generic);
+weak_alias (__fma, fma)
+
+# define __fma __fma_generic
+#endif
+
+#include <sysdeps/ieee754/dbl-64/s_fma.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-vis3.S
new file mode 100644
index 0000000000..0bd443a094
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf-vis3.S
@@ -0,0 +1,28 @@
+/* fmaf function, sparc32 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__fmaf_vis3)
+	movwtos	%o0, %f1
+	movwtos	%o1, %f3
+	movwtos	%o2, %f5
+	retl
+	 fmadds	%f1, %f3, %f5, %f0
+END (__fmaf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c
new file mode 100644
index 0000000000..7a273a3b13
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fmaf.c
@@ -0,0 +1,14 @@
+#ifdef HAVE_AS_VIS3_SUPPORT
+# include <sparc-ifunc.h>
+# include <math.h>
+
+extern float __fmaf_vis3 (float, float, float);
+extern float __fmaf_generic (float, float, float);
+
+sparc_libm_ifunc(__fmaf, hwcap & HWCAP_SPARC_FMAF ? __fmaf_vis3 : __fmaf_generic);
+weak_alias (__fmaf, fmaf)
+
+# define __fmaf __fmaf_generic
+#endif
+
+#include <sysdeps/ieee754/dbl-64/s_fmaf.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-vis3.S
new file mode 100644
index 0000000000..7b8616c97f
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-vis3.S
@@ -0,0 +1,58 @@
+/* llrint(), sparc32 v9 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__llrint_vis3)
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sllx	%o0, 32, %o0
+
+	or	%o0, %o1, %o0
+	fzero	ZERO
+
+	movxtod	%o0, %f0
+	sllx	%o2, 32, %o2
+	fnegd	ZERO, SIGN_BIT
+
+	movxtod	%o2, %f16
+	fabsd	%f0, %f14
+
+	fcmpd	%fcc3, %f14, %f16
+
+	fmovduge %fcc3, ZERO, %f16
+	fand	%f0, SIGN_BIT, SIGN_BIT
+
+	for	%f16, SIGN_BIT, %f16
+	faddd	%f0, %f16, %f6
+	fsubd	%f6, %f16, %f0
+	fabsd	%f0, %f0
+	for	%f0, SIGN_BIT, %f0
+	fdtox	%f0, %f4
+	movstouw %f4, %o0
+	retl
+	 movstouw %f5, %o1
+END (__llrint_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S
new file mode 100644
index 0000000000..fd23041404
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S
@@ -0,0 +1,24 @@
+#include <sparc-ifunc.h>
+#include <math_ldbl_opt.h>
+
+SPARC_ASM_VIS3_IFUNC(llrint)
+
+weak_alias (__llrint, llrint)
+
+strong_alias (__llrint, __lllrint)
+weak_alias (__lllrint, lllrint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
+compat_symbol (libm, __llrint, llrintl, GLIBC_2_1)
+#endif
+
+# undef weak_alias
+# define weak_alias(a, b)
+# undef strong_alias
+# define strong_alias(a, b)
+# undef compat_symbol
+# define compat_symbol(a, b, c, d)
+
+#define __llrint __llrint_generic
+
+#include "../s_llrint.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-vis3.S
new file mode 100644
index 0000000000..a3801893c5
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-vis3.S
@@ -0,0 +1,54 @@
+/* llrintf(), sparc32 v9 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__llrintf_vis3)
+	movwtos	%o0, %f1
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+
+	fnegs	ZERO, SIGN_BIT
+
+	movwtos	%o2, %f16
+	fabss	%f1, %f14
+
+	fcmps	%fcc3, %f14, %f16
+
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	fors	%f0, SIGN_BIT, %f0
+	fstox	%f0, %f4
+	movstouw %f4, %o0
+	retl
+	 movstouw %f5, %o1
+END (__llrintf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S
new file mode 100644
index 0000000000..8af5244e7e
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S
@@ -0,0 +1,17 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(llrintf)
+
+weak_alias (__llrintf, llrintf)
+
+strong_alias (__llrintf, __lllrintf)
+weak_alias (__lllrintf, lllrintf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+# undef strong_alias
+# define strong_alias(a, b)
+
+#define __llrintf __llrintf_generic
+
+#include "../s_llrintf.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
new file mode 100644
index 0000000000..612446b4ae
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
@@ -0,0 +1,66 @@
+/* Round float to int floating-point values without generating
+   an inexact exception, sparc32 v9 vis3 version.
+
+   Copyright (C) 2013-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__nearbyint_vis3)
+	sllx	%o0, 32, %o0
+	or	%o0, %o1, %o0
+	movxtod	%o0, %f0
+	fcmpd	%fcc3, %f0, %f0			/* Check for sNaN */
+	st	%fsr, [%sp + 88]
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sethi	%hi(0xf8003e0), %o5
+	ld	[%sp + 88], %o4
+	or	%o5, %lo(0xf8003e0), %o5
+	andn	%o4, %o5, %o4
+	fzero	ZERO
+	st	%o4, [%sp + 80]
+	sllx	%o2, 32, %o2
+	fnegd	ZERO, SIGN_BIT
+	ld	[%sp + 80], %fsr
+	movxtod	%o2, %f16
+	fabsd	%f0, %f14
+	fcmpd	%fcc3, %f14, %f16
+	fmovduge %fcc3, ZERO, %f16
+	fand	%f0, SIGN_BIT, SIGN_BIT
+	for	%f16, SIGN_BIT, %f16
+	faddd	%f0, %f16, %f6
+	fsubd	%f6, %f16, %f0
+	fabsd	%f0, %f0
+	for	%f0, SIGN_BIT, %f0
+	retl
+	 ld	[%sp + 88], %fsr
+END (__nearbyint_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
new file mode 100644
index 0000000000..47da9eaafe
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
@@ -0,0 +1,19 @@
+#include <sparc-ifunc.h>
+#include <math_ldbl_opt.h>
+
+SPARC_ASM_VIS3_IFUNC(nearbyint)
+
+weak_alias (__nearbyint, nearbyint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
+compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1)
+#endif
+
+# undef weak_alias
+# define weak_alias(a, b)
+# undef compat_symbol
+# define compat_symbol(a, b, c, d)
+
+#define __nearbyint __nearbyint_generic
+
+#include "../s_nearbyint.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
new file mode 100644
index 0000000000..2ac91a01c3
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
@@ -0,0 +1,62 @@
+/* Round float to int floating-point values without generating
+   an inexact exception, sparc32 v9 vis3 version.
+
+   Copyright (C) 2013-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__nearbyintf_vis3)
+	movwtos	%o0, %f1
+	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
+	st	%fsr, [%sp + 88]
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	sethi	%hi(0xf8003e0), %o5
+	ld	[%sp + 88], %o4
+	fzeros	ZERO
+	or	%o5, %lo(0xf8003e0), %o5
+	fnegs	ZERO, SIGN_BIT
+	andn	%o4, %o5, %o4
+	st	%o4, [%sp + 80]
+	ld	[%sp + 80], %fsr
+	movwtos	%o2, %f16
+	fabss	%f1, %f14
+	fcmps	%fcc3, %f14, %f16
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	fors	%f0, SIGN_BIT, %f0
+	retl
+	 ld	[%sp + 88], %fsr
+END (__nearbyintf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
new file mode 100644
index 0000000000..95100c1bfc
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(nearbyintf)
+
+weak_alias (__nearbyintf, nearbyintf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __nearbyintf __nearbyintf_generic
+
+#include "../s_nearbyintf.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-vis3.S
new file mode 100644
index 0000000000..39cb43706a
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-vis3.S
@@ -0,0 +1,55 @@
+/* Round float to int floating-point values, sparc32 v9 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__rint_vis3)
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sllx	%o0, 32, %o0
+
+	or	%o0, %o1, %o0
+	fzero	ZERO
+
+	movxtod	%o0, %f0
+	sllx	%o2, 32, %o2
+	fnegd	ZERO, SIGN_BIT
+
+	movxtod	%o2, %f16
+	fabsd	%f0, %f14
+
+	fcmpd	%fcc3, %f14, %f16
+
+	fmovduge %fcc3, ZERO, %f16
+	fand	%f0, SIGN_BIT, SIGN_BIT
+
+	for	%f16, SIGN_BIT, %f16
+	faddd	%f0, %f16, %f6
+	fsubd	%f6, %f16, %f0
+	fabsd	%f0, %f0
+	retl
+	 for	%f0, SIGN_BIT, %f0
+END (__rint_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S
new file mode 100644
index 0000000000..de893faebf
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S
@@ -0,0 +1,19 @@
+#include <sparc-ifunc.h>
+#include <math_ldbl_opt.h>
+
+SPARC_ASM_VIS3_IFUNC(rint)
+
+weak_alias (__rint, rint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
+compat_symbol (libm, __rint, rintl, GLIBC_2_0)
+#endif
+
+# undef weak_alias
+# define weak_alias(a, b)
+# undef compat_symbol
+# define compat_symbol(a, b, c, d)
+
+#define __rint __rint_generic
+
+#include "../s_rint.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-vis3.S
new file mode 100644
index 0000000000..26c9d82ede
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-vis3.S
@@ -0,0 +1,51 @@
+/* Round float to int floating-point values, sparc32 v9 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__rintf_vis3)
+	movwtos	%o0, %f1
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+
+	fnegs	ZERO, SIGN_BIT
+
+	movwtos	%o2, %f16
+	fabss	%f1, %f14
+
+	fcmps	%fcc3, %f14, %f16
+
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	retl
+	 fors	%f0, SIGN_BIT, %f0
+END (__rintf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S
new file mode 100644
index 0000000000..38fd936086
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(rintf)
+
+weak_alias (__rintf, rintf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __rintf __rintf_generic
+
+#include "../s_rintf.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat-vis3.S
new file mode 100644
index 0000000000..06ff449150
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat-vis3.S
@@ -0,0 +1,49 @@
+/* sqrt function.  sparc32 v9 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__sqrt_vis3)
+	movwtos	%o0, %f0
+	fzero	%f8
+	movwtos	%o1, %f1
+	fcmpd	%f0, %f8
+	fbl	1f
+	 nop
+8:	retl
+	 fsqrtd	%f0, %f0
+1:
+#ifdef SHARED
+	SETUP_PIC_REG_LEAF(o5, g1)
+	sethi	%gdop_hix22(_LIB_VERSION), %g1
+	xor	%g1, %gdop_lox10(_LIB_VERSION), %g1
+	ld	[%o5 + %g1], %g1, %gdop(_LIB_VERSION)
+#else
+	sethi	%hi(_LIB_VERSION), %g1
+	or	%g1, %lo(_LIB_VERSION), %g1
+#endif
+	ld	[%g1], %g1
+	cmp	%g1, -1
+	be	8b
+	 mov	%o0, %o2
+	mov	%o1, %o3
+	mov	26, %o4
+	mov	%o7, %g1
+	call	__kernel_standard
+	 mov	%g1, %o7
+END (__sqrt_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat.S
new file mode 100644
index 0000000000..1ccac19e29
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrt_compat.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(sqrt)
+
+weak_alias (__sqrt, sqrt)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __sqrt __sqrt_generic
+
+#include "../w_sqrt_compat.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat-vis3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat-vis3.S
new file mode 100644
index 0000000000..5b21523fc0
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat-vis3.S
@@ -0,0 +1,47 @@
+/* sqrtf function.  sparc32 v9 vis3 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__sqrtf_vis3)
+	movwtos	%o0, %f0
+	fzeros	%f8
+	fcmps	%f0, %f8
+	fbl	1f
+	 nop
+8:	retl
+	 fsqrts	%f0, %f0
+1:
+#ifdef SHARED
+	SETUP_PIC_REG_LEAF(o5, g1)
+	sethi	%gdop_hix22(_LIB_VERSION), %g1
+	xor	%g1, %gdop_lox10(_LIB_VERSION), %g1
+	ld	[%o5 + %g1], %g1, %gdop(_LIB_VERSION)
+#else
+	sethi	%hi(_LIB_VERSION), %g1
+	or	%g1, %lo(_LIB_VERSION), %g1
+#endif
+	ld	[%g1], %g1
+	cmp	%g1, -1
+	be	8b
+	 mov	%o0, %o1
+	mov	126, %o2
+	mov	%o7, %g1
+	call	__kernel_standard_f
+	 mov	%g1, %o7
+END (__sqrtf_vis3)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat.S
new file mode 100644
index 0000000000..f0e759a2c8
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/w_sqrtf_compat.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(sqrtf)
+
+weak_alias (__sqrtf, sqrtf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __sqrtf __sqrtf_generic
+
+#include "../w_sqrtf_compat.S"
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_fabs.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_fabs.S
new file mode 100644
index 0000000000..bf51739b5a
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_fabs.S
@@ -0,0 +1,28 @@
+/* Float absolute value, sparc32+v9 version.
+   Copyright (C) 2011-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__fabs)
+	st	%o0, [%sp+72]
+	st	%o1, [%sp+76]
+	ldd	[%sp+72], %f0
+	retl
+	 fabsd	%f0, %f0
+END (__fabs)
+weak_alias (__fabs, fabs)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_isnan.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_isnan.S
new file mode 100644
index 0000000000..62c4fc3593
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_isnan.S
@@ -0,0 +1,40 @@
+/* isnan().  sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+ENTRY (__isnan)
+	sethi	%hi(0x7ff00000), %g1
+	sllx	%o0, 33, %o0
+	sllx	%g1, 32, %g1
+	srlx	%o0, 1, %o0
+	or	%o0, %o1, %o0
+	sub	%g1, %o0, %o0
+	retl
+	 srlx	%o0, 63, %o0
+END (__isnan)
+hidden_def (__isnan)
+weak_alias (__isnan, isnan)
+
+#if !IS_IN (libm)
+# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0)
+compat_symbol (libc, __isnan, __isnanl, GLIBC_2_0);
+compat_symbol (libc, isnan, isnanl, GLIBC_2_0);
+# endif
+#endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S
new file mode 100644
index 0000000000..62bd9f50c7
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S
@@ -0,0 +1,72 @@
+/* llrint(), sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__llrint)
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sllx	%o0, 32, %o0
+
+	or	%o0, %o1, %o0
+	fzero	ZERO
+
+	stx	%o0, [%sp + 72]
+	sllx	%o2, 32, %o2
+	fnegd	ZERO, SIGN_BIT
+
+	ldd	[%sp + 72], %f0
+
+	stx	%o2, [%sp + 72]
+	fabsd	%f0, %f14
+
+	ldd	[%sp + 72], %f16
+	fcmpd	%fcc3, %f14, %f16
+
+	fmovduge %fcc3, ZERO, %f16
+	fand	%f0, SIGN_BIT, SIGN_BIT
+
+	for	%f16, SIGN_BIT, %f16
+	faddd	%f0, %f16, %f6
+	fsubd	%f6, %f16, %f0
+	fabsd	%f0, %f0
+	for	%f0, SIGN_BIT, %f0
+	fdtox	%f0, %f4
+	std	%f4, [%sp + 72]
+	retl
+	 ldd	[%sp + 72], %o0
+END (__llrint)
+weak_alias (__llrint, llrint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
+compat_symbol (libm, __llrint, llrintl, GLIBC_2_1)
+#endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S
new file mode 100644
index 0000000000..cda284b124
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S
@@ -0,0 +1,62 @@
+/* llrintf(), sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__llrintf)
+	st	%o0, [%sp + 68]
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+
+	ld	[%sp + 68], %f1
+	fnegs	ZERO, SIGN_BIT
+
+	st	%o2, [%sp + 68]
+	fabss	%f1, %f14
+
+	ld	[%sp + 68], %f16
+	fcmps	%fcc3, %f14, %f16
+
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	fors	%f0, SIGN_BIT, %f0
+	fstox	%f0, %f4
+	std	%f4, [%sp + 72]
+	retl
+	 ldd	[%sp + 72], %o0
+END (__llrintf)
+weak_alias (__llrintf, llrintf)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S
new file mode 100644
index 0000000000..a242b755d0
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S
@@ -0,0 +1,62 @@
+/* lrintf(), sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__lrintf)
+	st	%o0, [%sp + 68]
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+
+	ld	[%sp + 68], %f1
+	fnegs	ZERO, SIGN_BIT
+
+	st	%o2, [%sp + 68]
+	fabss	%f1, %f14
+
+	ld	[%sp + 68], %f16
+	fcmps	%fcc3, %f14, %f16
+
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	fors	%f0, SIGN_BIT, %f0
+	fstoi	%f0, %f3
+	st	%f3, [%sp + 68]
+	retl
+	 ld	[%sp + 68], %o0
+END (__lrintf)
+weak_alias (__lrintf, lrintf)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
new file mode 100644
index 0000000000..c26d2e3e44
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
@@ -0,0 +1,73 @@
+/* Round float to int floating-point values without generating
+   an inexact exception, sparc32 v9 version.
+
+   Copyright (C) 2013-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__nearbyint)
+	sllx	%o0, 32, %o0
+	or	%o0, %o1, %o0
+	stx	%o0, [%sp + 72]
+	ldd	[%sp + 72], %f0
+	fcmpd	%fcc3, %f0, %f0			/* Check for sNaN */
+	st	%fsr, [%sp + 88]
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sethi	%hi(0xf8003e0), %o5
+	ld	[%sp + 88], %o4
+	or	%o5, %lo(0xf8003e0), %o5
+	andn	%o4, %o5, %o4
+	fzero	ZERO
+	st	%o4, [%sp + 80]
+	sllx	%o2, 32, %o2
+	fnegd	ZERO, SIGN_BIT
+	ld	[%sp + 80], %fsr
+	stx	%o2, [%sp + 72]
+	fabsd	%f0, %f14
+	ldd	[%sp + 72], %f16
+	fcmpd	%fcc3, %f14, %f16
+	fmovduge %fcc3, ZERO, %f16
+	fand	%f0, SIGN_BIT, SIGN_BIT
+	for	%f16, SIGN_BIT, %f16
+	faddd	%f0, %f16, %f6
+	fsubd	%f6, %f16, %f0
+	fabsd	%f0, %f0
+	for	%f0, SIGN_BIT, %f0
+	retl
+	 ld	[%sp + 88], %fsr
+END (__nearbyint)
+weak_alias (__nearbyint, nearbyint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
+compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1)
+#endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
new file mode 100644
index 0000000000..1e65c79ee6
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
@@ -0,0 +1,65 @@
+/* Round float to int floating-point values without generating
+   an inexact exception, sparc32 v9 version.
+
+   Copyright (C) 2013-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__nearbyintf)
+	st	%o0, [%sp + 68]
+	ld	[%sp + 68], %f1
+	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
+	st	%fsr, [%sp + 88]
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	sethi	%hi(0xf8003e0), %o5
+	ld	[%sp + 88], %o4
+	fzeros	ZERO
+	or	%o5, %lo(0xf8003e0), %o5
+	fnegs	ZERO, SIGN_BIT
+	andn	%o4, %o5, %o4
+	st	%o4, [%sp + 80]
+	ld	[%sp + 80], %fsr
+	st	%o2, [%sp + 68]
+	fabss	%f1, %f14
+	ld	[%sp + 68], %f16
+	fcmps	%fcc3, %f14, %f16
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	fors	%f0, SIGN_BIT, %f0
+	retl
+	 ld	[%sp + 88], %fsr
+END (__nearbyintf)
+weak_alias (__nearbyintf, nearbyintf)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S
new file mode 100644
index 0000000000..f3560ccc79
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S
@@ -0,0 +1,69 @@
+/* Round float to int floating-point values, sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_FIFTYTWO	0x43300000		/* 2**52 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__rint)
+	sethi	%hi(TWO_FIFTYTWO), %o2
+	sllx	%o0, 32, %o0
+
+	or	%o0, %o1, %o0
+	fzero	ZERO
+
+	stx	%o0, [%sp + 72]
+	sllx	%o2, 32, %o2
+	fnegd	ZERO, SIGN_BIT
+
+	ldd	[%sp + 72], %f0
+
+	stx	%o2, [%sp + 72]
+	fabsd	%f0, %f14
+
+	ldd	[%sp + 72], %f16
+	fcmpd	%fcc3, %f14, %f16
+
+	fmovduge %fcc3, ZERO, %f16
+	fand	%f0, SIGN_BIT, SIGN_BIT
+
+	for	%f16, SIGN_BIT, %f16
+	faddd	%f0, %f16, %f6
+	fsubd	%f6, %f16, %f0
+	fabsd	%f0, %f0
+	retl
+	 for	%f0, SIGN_BIT, %f0
+END (__rint)
+weak_alias (__rint, rint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
+compat_symbol (libm, __rint, rintl, GLIBC_2_0)
+#endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S
new file mode 100644
index 0000000000..dfdae9dcdd
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S
@@ -0,0 +1,59 @@
+/* Round float to int floating-point values, sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+	/* We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
+
+#define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
+
+#define ZERO		%f10			/* 0.0 */
+#define SIGN_BIT	%f12			/* -0.0 */
+
+ENTRY (__rintf)
+	st	%o0, [%sp + 68]
+	sethi	%hi(TWO_TWENTYTHREE), %o2
+	fzeros	ZERO
+
+	ld	[%sp + 68], %f1
+	fnegs	ZERO, SIGN_BIT
+
+	st	%o2, [%sp + 68]
+	fabss	%f1, %f14
+
+	ld	[%sp + 68], %f16
+	fcmps	%fcc3, %f14, %f16
+
+	fmovsuge %fcc3, ZERO, %f16
+	fands	%f1, SIGN_BIT, SIGN_BIT
+
+	fors	%f16, SIGN_BIT, %f16
+	fadds	%f1, %f16, %f5
+	fsubs	%f5, %f16, %f0
+	fabss	%f0, %f0
+	retl
+	 fors	%f0, SIGN_BIT, %f0
+END (__rintf)
+weak_alias (__rintf, rintf)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrt_compat.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrt_compat.S
new file mode 100644
index 0000000000..4415a82024
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrt_compat.S
@@ -0,0 +1,51 @@
+/* sqrt function.  sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__sqrt)
+	std	%o0, [%sp + 80]
+	fzero	%f8
+	ldd	[%sp + 80], %f0
+	fcmpd	%f0, %f8
+	fbl	1f
+	 nop
+8:	retl
+	 fsqrtd	%f0, %f0
+1:
+#ifdef SHARED
+	SETUP_PIC_REG_LEAF(o5, g1)
+	sethi	%gdop_hix22(_LIB_VERSION), %g1
+	xor	%g1, %gdop_lox10(_LIB_VERSION), %g1
+	ld	[%o5 + %g1], %g1, %gdop(_LIB_VERSION)
+#else
+	sethi	%hi(_LIB_VERSION), %g1
+	or	%g1, %lo(_LIB_VERSION), %g1
+#endif
+	ld	[%g1], %g1
+	cmp	%g1, -1
+	be	8b
+	 mov	%o0, %o2
+	mov	%o1, %o3
+	mov	26, %o4
+	mov	%o7, %g1
+	call	__kernel_standard
+	 mov	%g1, %o7
+END (__sqrt)
+
+weak_alias (__sqrt, sqrt)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrtf_compat.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrtf_compat.S
new file mode 100644
index 0000000000..1c3c97f8e9
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/fpu/w_sqrtf_compat.S
@@ -0,0 +1,50 @@
+/* sqrtf function.  sparc32 v9 version.
+   Copyright (C) 2012-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+
+ENTRY (__sqrtf)
+	st	%o0, [%sp + 72]
+	fzeros	%f8
+	ld	[%sp + 72], %f0
+	fcmps	%f0, %f8
+	fbl	1f
+	 nop
+8:	retl
+	 fsqrts	%f0, %f0
+1:
+#ifdef SHARED
+	SETUP_PIC_REG_LEAF(o5, g1)
+	sethi	%gdop_hix22(_LIB_VERSION), %g1
+	xor	%g1, %gdop_lox10(_LIB_VERSION), %g1
+	ld	[%o5 + %g1], %g1, %gdop(_LIB_VERSION)
+#else
+	sethi	%hi(_LIB_VERSION), %g1
+	or	%g1, %lo(_LIB_VERSION), %g1
+#endif
+	ld	[%g1], %g1
+	cmp	%g1, -1
+	be	8b
+	 mov	%o0, %o1
+	mov	126, %o2
+	mov	%o7, %g1
+	call	__kernel_standard_f
+	 mov	%g1, %o7
+END (__sqrtf)
+
+weak_alias (__sqrtf, sqrtf)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/hp-timing.h b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/hp-timing.h
new file mode 100644
index 0000000000..2dfa2d2265
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/hp-timing.h
@@ -0,0 +1,36 @@
+/* High precision, low overhead timing functions.  sparcv9 version.
+   Copyright (C) 2001-2017 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by David S. Miller <davem@redhat.com>, 2001.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _HP_TIMING_H
+#define _HP_TIMING_H	1
+
+#define HP_TIMING_AVAIL		(1)
+#define HP_SMALL_TIMING_AVAIL	(1)
+#define HP_TIMING_INLINE	(1)
+
+typedef unsigned long long int hp_timing_t;
+
+#define HP_TIMING_NOW(Var) \
+      __asm__ __volatile__ ("rd %%tick, %L0\n\t" \
+			    "srlx %L0, 32, %H0" \
+			    : "=r" (Var))
+
+#include <hp-timing-common.h>
+
+#endif	/* hp-timing.h */
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memchr.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memchr.S
new file mode 100644
index 0000000000..c5dfbef184
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memchr.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/memchr.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcmp.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcmp.S
new file mode 100644
index 0000000000..44878f4486
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcmp.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/memcmp.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcpy.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcpy.S
new file mode 100644
index 0000000000..675ec496b9
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memcpy.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/memcpy.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memset.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memset.S
new file mode 100644
index 0000000000..ac67b7ab7c
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/memset.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/memset.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/mul_1.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/mul_1.S
new file mode 100644
index 0000000000..ae4fc17325
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/mul_1.S
@@ -0,0 +1,70 @@
+! SPARC v9 32-bit __mpn_mul_1 -- Multiply a limb vector with a single
+! limb and store the product in a second limb vector.
+!
+! Copyright (C) 2013-2017 Free Software Foundation, Inc.
+! This file is part of the GNU C Library.
+! Contributed by David S. Miller <davem@davemloft.net>
+!
+! The GNU C Library is free software; you can redistribute it and/or
+! modify it under the terms of the GNU Lesser General Public
+! License as published by the Free Software Foundation; either
+! version 2.1 of the License, or (at your option) any later version.
+!
+! The GNU C Library is distributed in the hope that it will be useful,
+! but WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+! Lesser General Public License for more details.
+!
+! You should have received a copy of the GNU Lesser General Public
+! License along with the GNU C Library; if not, see
+! <http://www.gnu.org/licenses/>.
+
+#include <sysdep.h>
+
+#define res_ptr	%o0
+#define s1_ptr	%o1
+#define sz	%o2
+#define s2_limb	%o3
+#define carry	%o5
+#define tmp1	%g1
+#define tmp2	%g2
+#define tmp3	%g3
+#define tmp4	%o4
+
+ENTRY(__mpn_mul_1)
+	srl	sz, 0, sz
+	srl	s2_limb, 0, s2_limb
+	subcc	sz, 1, sz
+	be,pn	%icc, .Lfinal_limb
+	 clr	carry
+
+.Lloop:
+	lduw	[s1_ptr + 0x00], tmp1
+	lduw	[s1_ptr + 0x04], tmp2
+	mulx	tmp1, s2_limb, tmp3
+	add	s1_ptr, 8, s1_ptr
+	mulx	tmp2, s2_limb, tmp4
+	sub	sz, 2, sz
+	add	res_ptr, 8, res_ptr
+	add	carry, tmp3, tmp3
+	stw	tmp3, [res_ptr - 0x08]
+	srlx	tmp3, 32, carry
+	add	carry, tmp4, tmp4
+	stw	tmp4, [res_ptr - 0x04]
+	brgz	sz, .Lloop
+	 srlx	tmp4, 32, carry
+
+	brlz,pt	sz, .Lfinish
+	 nop
+
+.Lfinal_limb:
+	lduw	[s1_ptr + 0x00], tmp1
+	mulx	tmp1, s2_limb, tmp3
+	add	carry, tmp3, tmp3
+	stw	tmp3, [res_ptr + 0x00]
+	srlx	tmp3, 32, carry
+
+.Lfinish:
+	retl
+	 mov	carry, %o0
+END(__mpn_mul_1)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
new file mode 100644
index 0000000000..4ad7aff914
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -0,0 +1,12 @@
+ifeq ($(subdir),crypt)
+libcrypt-sysdep_routines += md5-crop sha256-crop sha512-crop
+endif
+
+ifeq ($(subdir),locale)
+localedef-aux += md5-crop
+endif
+
+ifeq ($(subdir),string)
+sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
+		   memset-niagara1 memcpy-niagara4 memset-niagara4
+endif
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/ifunc-impl-list.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/ifunc-impl-list.c
new file mode 100644
index 0000000000..a04aa0f674
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/ifunc-impl-list.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/ifunc-impl-list.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-block.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-block.c
new file mode 100644
index 0000000000..3765cabae7
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-block.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/md5-block.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-crop.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-crop.S
new file mode 100644
index 0000000000..11a3a81482
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/md5-crop.S
@@ -0,0 +1 @@
+#include <sparc64/multiarch/md5-crop.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara1.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara1.S
new file mode 100644
index 0000000000..10aef85fe1
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara1.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memcpy-niagara1.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara2.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara2.S
new file mode 100644
index 0000000000..6b1bf6ea70
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara2.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memcpy-niagara2.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara4.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara4.S
new file mode 100644
index 0000000000..75ef9c017e
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-niagara4.S
@@ -0,0 +1 @@
+#include <sparc64/multiarch/memcpy-niagara4.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra3.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra3.S
new file mode 100644
index 0000000000..77adf151aa
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-ultra3.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memcpy-ultra3.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S
new file mode 100644
index 0000000000..14df91e005
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/multiarch/memcpy.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara1.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara1.S
new file mode 100644
index 0000000000..b432420876
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara1.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memset-niagara1.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara4.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara4.S
new file mode 100644
index 0000000000..6545019c46
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara4.S
@@ -0,0 +1 @@
+#include <sparc64/multiarch/memset-niagara4.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S
new file mode 100644
index 0000000000..8f8264337d
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/memset.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/multiarch/memset.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memcpy.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memcpy.c
new file mode 100644
index 0000000000..304ad4ef18
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memcpy.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/rtld-memcpy.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memset.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memset.c
new file mode 100644
index 0000000000..f24ae880a9
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memset.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/rtld-memset.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-block.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-block.c
new file mode 100644
index 0000000000..600c602b61
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-block.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/sha256-block.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-crop.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-crop.S
new file mode 100644
index 0000000000..4895405853
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha256-crop.S
@@ -0,0 +1 @@
+#include <sparc64/multiarch/sha256-crop.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-block.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-block.c
new file mode 100644
index 0000000000..7c7c54e5a6
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-block.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/sha512-block.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-crop.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-crop.S
new file mode 100644
index 0000000000..cc74a99d3c
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/multiarch/sha512-crop.S
@@ -0,0 +1 @@
+#include <sparc64/multiarch/sha512-crop.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_barrier_wait.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_barrier_wait.c
new file mode 100644
index 0000000000..246c8d49de
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_barrier_wait.c
@@ -0,0 +1 @@
+#include <nptl/pthread_barrier_wait.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_init.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_init.c
new file mode 100644
index 0000000000..1eede86abd
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_init.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/pthread_spin_init.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_lock.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_lock.S
new file mode 100644
index 0000000000..ce53dfa396
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_lock.S
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/pthread_spin_lock.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_trylock.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_trylock.S
new file mode 100644
index 0000000000..ffd632da0a
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_trylock.S
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/pthread_spin_trylock.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_unlock.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_unlock.S
new file mode 100644
index 0000000000..983c80377a
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/pthread_spin_unlock.S
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/pthread_spin_unlock.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rawmemchr.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rawmemchr.S
new file mode 100644
index 0000000000..05c269ecc8
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rawmemchr.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/rawmemchr.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rem.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rem.S
new file mode 100644
index 0000000000..5385bd8305
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rem.S
@@ -0,0 +1,22 @@
+/*
+ * Sparc v9 has divide.
+ * As divx takes 68 cycles and sdivcc only 36,
+ * we use sdivcc eventhough it is deprecated.
+ */
+
+#include <sysdep.h>
+
+	.text
+	.align		32
+ENTRY(.rem)
+
+	sra		%o0, 31, %o2
+	wr		%o2, 0, %y
+	sdivcc		%o0, %o1, %o2
+	xnor		%o2, %g0, %o3
+	movvs		%icc, %o3, %o2
+	smul		%o2, %o1, %o2
+	retl
+	 sub		%o0, %o2, %o0
+
+END(.rem)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memcpy.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memcpy.c
new file mode 100644
index 0000000000..6f8386bc76
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memcpy.c
@@ -0,0 +1 @@
+#include <sparc64/rtld-memcpy.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memset.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memset.c
new file mode 100644
index 0000000000..49b29f5733
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/rtld-memset.c
@@ -0,0 +1 @@
+#include <sparc64/rtld-memset.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sdiv.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sdiv.S
new file mode 100644
index 0000000000..d765514cea
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sdiv.S
@@ -0,0 +1,20 @@
+/*
+ * Sparc v9 has divide.
+ * As divx takes 68 cycles and sdivcc only 36,
+ * we use sdivcc eventhough it is deprecated.
+ */
+
+#include <sysdep.h>
+
+	.text
+	.align		32
+ENTRY(.div)
+
+	sra		%o0, 31, %o2
+	wr		%o2, 0, %y
+	sdivcc		%o0, %o1, %o0
+	xnor		%o0, %g0, %o2
+	retl
+	 movvs		%icc, %o2, %o0
+
+END(.div)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_post.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_post.c
new file mode 100644
index 0000000000..6a2813caee
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_post.c
@@ -0,0 +1 @@
+#include <nptl/sem_post.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c
new file mode 100644
index 0000000000..d4a139572b
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c
@@ -0,0 +1 @@
+#include <nptl/sem_waitcommon.c>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpcpy.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpcpy.S
new file mode 100644
index 0000000000..440ad7e215
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpcpy.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/stpcpy.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpncpy.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpncpy.S
new file mode 100644
index 0000000000..124136a0b2
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/stpncpy.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/stpncpy.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcat.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcat.S
new file mode 100644
index 0000000000..7a22235703
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcat.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strcat.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strchr.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strchr.S
new file mode 100644
index 0000000000..ddd32120d4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strchr.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strchr.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcmp.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcmp.S
new file mode 100644
index 0000000000..5330f4359b
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcmp.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strcmp.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcpy.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcpy.S
new file mode 100644
index 0000000000..0b35c9be08
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcpy.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strcpy.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcspn.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcspn.S
new file mode 100644
index 0000000000..f9d6beabe4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strcspn.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strcspn.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strlen.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strlen.S
new file mode 100644
index 0000000000..28a216c076
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strlen.S
@@ -0,0 +1 @@
+#include <sparc64/strlen.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncmp.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncmp.S
new file mode 100644
index 0000000000..addd89e05b
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncmp.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strncmp.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncpy.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncpy.S
new file mode 100644
index 0000000000..688f9dfd65
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strncpy.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strncpy.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strpbrk.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strpbrk.S
new file mode 100644
index 0000000000..62294c0af4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strpbrk.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strpbrk.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strrchr.c b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strrchr.c
new file mode 100644
index 0000000000..ec608d6ab3
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strrchr.c
@@ -0,0 +1 @@
+/* strrchr is in strchr.S */
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strspn.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strspn.S
new file mode 100644
index 0000000000..291e798085
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/strspn.S
@@ -0,0 +1,4 @@
+#define ASI_PNF     0x82
+#define ASI_BLK_P   0xf0
+#define XCC icc
+#include <sparc64/strspn.S>
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/submul_1.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/submul_1.S
new file mode 100644
index 0000000000..52b7d35aa4
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/submul_1.S
@@ -0,0 +1,82 @@
+! SPARC v9 32-bit __mpn_submul_1 -- Multiply a limb vector with a limb
+! and subtract the result from a second limb vector.
+!
+! Copyright (C) 2013-2017 Free Software Foundation, Inc.
+! This file is part of the GNU C Library.
+! Contributed by David S. Miller <davem@davemloft.net>
+!
+! The GNU C Library is free software; you can redistribute it and/or
+! modify it under the terms of the GNU Lesser General Public
+! License as published by the Free Software Foundation; either
+! version 2.1 of the License, or (at your option) any later version.
+!
+! The GNU C Library is distributed in the hope that it will be useful,
+! but WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+! Lesser General Public License for more details.
+!
+! You should have received a copy of the GNU Lesser General Public
+! License along with the GNU C Library; if not, see
+! <http://www.gnu.org/licenses/>.
+
+#include <sysdep.h>
+
+#define res_ptr	%i0
+#define s1_ptr	%i1
+#define sz_arg	%i2
+#define s2l_arg	%i3
+#define sz	%o4
+#define carry	%o5
+#define s2_limb	%g1
+#define tmp1	%l0
+#define tmp2	%l1
+#define tmp3	%l2
+#define tmp4	%l3
+#define tmp64_1	%g3
+#define tmp64_2	%o3
+
+ENTRY(__mpn_submul_1)
+	save	%sp, -96, %sp
+	srl	sz_arg, 0, sz
+	srl	s2l_arg, 0, s2_limb
+	subcc	sz, 1, sz
+	be,pn	%icc, .Lfinal_limb
+	 subcc	%g0, 0, carry
+
+.Lloop:
+	lduw	[s1_ptr  + 0x00], tmp1
+	lduw	[res_ptr + 0x00], tmp3
+	lduw	[s1_ptr  + 0x04], tmp2
+	lduw	[res_ptr + 0x04], tmp4
+	mulx	tmp1, s2_limb, tmp64_1
+	add	s1_ptr, 8, s1_ptr
+	mulx	tmp2, s2_limb, tmp64_2
+	sub	sz, 2, sz
+	add	res_ptr, 8, res_ptr
+	addx	carry, tmp64_1, tmp64_1
+	srlx	tmp64_1, 32, carry
+	subcc	tmp3, tmp64_1, tmp64_1
+	stw	tmp64_1, [res_ptr - 0x08]
+	addx	carry, tmp64_2, tmp64_2
+	srlx	tmp64_2, 32, carry
+	subcc	tmp4, tmp64_2, tmp64_2
+	brgz	sz, .Lloop
+	 stw	tmp64_2, [res_ptr - 0x04]
+
+	brlz,pt	sz, .Lfinish
+	 nop
+
+.Lfinal_limb:
+	lduw	[s1_ptr + 0x00], tmp1
+	lduw	[res_ptr + 0x00], tmp3
+	mulx	tmp1, s2_limb, tmp64_1
+	addx	carry, tmp64_1, tmp64_1
+	srlx	tmp64_1, 32, carry
+	subcc	tmp3, tmp64_1, tmp64_1
+	stw	tmp64_1, [res_ptr + 0x00]
+
+.Lfinish:
+	addx	carry, 0, carry
+	jmpl	%i7 + 0x8, %g0
+	 restore carry, 0, %o0
+END(__mpn_submul_1)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/udiv.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/udiv.S
new file mode 100644
index 0000000000..368f85ede2
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/udiv.S
@@ -0,0 +1,18 @@
+/*
+ * Sparc v9 has divide.
+ * As divx takes 68 cycles and udiv only 37,
+ * we use udiv eventhough it is deprecated.
+ */
+
+#include <sysdep.h>
+
+	.text
+	.align		32
+ENTRY(.udiv)
+
+	wr		%g0, 0, %y
+	retl
+	 udiv		%o0, %o1, %o0
+
+END(.udiv)
+strong_alias (.udiv, __wrap_.udiv)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/umul.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/umul.S
new file mode 100644
index 0000000000..608b72aca1
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/umul.S
@@ -0,0 +1,17 @@
+/*
+ * Sparc v9 has multiply.
+ */
+
+#include <sysdep.h>
+
+	.text
+	.align		32
+ENTRY(.umul)
+
+	srl		%o0, 0, %o0
+	srl		%o1, 0, %o1
+	mulx		%o0, %o1, %o0
+	retl
+	 srlx		%o0, 32, %o1
+
+END(.umul)
diff --git a/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/urem.S b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/urem.S
new file mode 100644
index 0000000000..cab16c9193
--- /dev/null
+++ b/REORG.TODO/sysdeps/sparc/sparc32/sparcv9/urem.S
@@ -0,0 +1,19 @@
+/*
+ * Sparc v9 has divide.
+ * As divx takes 68 cycles and udiv only 37,
+ * we use udiv eventhough it is deprecated.
+ */
+
+#include <sysdep.h>
+
+	.text
+	.align		32
+ENTRY(.urem)
+
+	wr		%g0, 0, %y
+	udiv		%o0, %o1, %o2
+	umul		%o2, %o1, %o2
+	retl
+	 sub		%o0, %o2, %o0
+
+END(.urem)