about summary refs log tree commit diff
diff options
context:
space:
mode:
-rw-r--r--ChangeLog5
-rw-r--r--sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c4
2 files changed, 7 insertions, 2 deletions
diff --git a/ChangeLog b/ChangeLog
index 3a94b71fe7..36ce7b34e3 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2019-01-15  Rogerio A. Cardoso  <rcardoso@linux.ibm.com>
+
+	* sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c:
+	(do_test): Changed __vector __int128_t to __vector unsigned int.
+
 2019-01-14  Leonardo Sandoval  <leonardo.sandoval.gonzalez@intel.com>
 
 	* sysdeps/x86_64/multiarch/Makefile (sysdep_routines): Add
diff --git a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
index 2dcf5bb634..dbe06c847b 100644
--- a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
+++ b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
@@ -44,8 +44,8 @@ do_test (void)
   uint32_t* vscr_ptr = vscr;
   uint32_t vscr_word;
   ucontext_t ucp;
-  __vector __int128_t v0 = {0};
-  __vector __int128_t v1 = {0};
+  __vector unsigned int v0 = {0};
+  __vector unsigned int v1 = {0};
 
   /* Set SAT bit in VSCR register.  */
   asm volatile (".machine push;\n"