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-rw-r--r--ports/ChangeLog.tile4
-rw-r--r--ports/sysdeps/tile/bits/endian.h4
2 files changed, 5 insertions, 3 deletions
diff --git a/ports/ChangeLog.tile b/ports/ChangeLog.tile
index 68e1b0a61e..303311d303 100644
--- a/ports/ChangeLog.tile
+++ b/ports/ChangeLog.tile
@@ -1,3 +1,7 @@
+2013-06-12  Chris Metcalf  <cmetcalf@tilera.com>
+
+	* sysdeps/tile/bits/endian.h (__BYTE_ORDER): Default to little.
+
 2013-05-23  Chris Metcalf  <cmetcalf@tilera.com>
 
 	* sysdeps/tile/tilegx/Makefile ($(cflags-mcmodel-large)):
diff --git a/ports/sysdeps/tile/bits/endian.h b/ports/sysdeps/tile/bits/endian.h
index 43d94bb7a7..835042a7ac 100644
--- a/ports/sysdeps/tile/bits/endian.h
+++ b/ports/sysdeps/tile/bits/endian.h
@@ -6,8 +6,6 @@
 
 #if defined __BIG_ENDIAN__
 # define __BYTE_ORDER __BIG_ENDIAN
-#elif defined __LITTLE_ENDIAN__
-# define __BYTE_ORDER __LITTLE_ENDIAN
 #else
-# error "Endianness not declared!!"
+# define __BYTE_ORDER __LITTLE_ENDIAN
 #endif