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-rw-r--r--ChangeLog4
-rw-r--r--sysdeps/x86/cacheinfo.c4
2 files changed, 8 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 80a6c3ec97..4abd668481 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,9 @@
 2017-05-24  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* sysdeps/x86/cacheinfo.c: Skip if not in libc.
+
+2017-05-24  H.J. Lu  <hongjiu.lu@intel.com>
+
 	* sysdeps/x86/cacheinfo.c (is_intel): Removed.
 	(is_amd): Likewise.
 	(max_cpuid): Likewise.
diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c
index 4594a2fa60..12ffeef5b5 100644
--- a/sysdeps/x86/cacheinfo.c
+++ b/sysdeps/x86/cacheinfo.c
@@ -16,6 +16,8 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
+#if IS_IN (libc)
+
 #include <assert.h>
 #include <stdbool.h>
 #include <stdlib.h>
@@ -768,3 +770,5 @@ intel_bug_no_cache_info:
      store becomes faster.  */
   __x86_shared_non_temporal_threshold = __x86_shared_cache_size * 6;
 }
+
+#endif