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-rw-r--r--ChangeLog170
-rw-r--r--sysdeps/arm/sys/ucontext.h34
-rw-r--r--sysdeps/i386/sys/ucontext.h40
-rw-r--r--sysdeps/m68k/sys/ucontext.h44
-rw-r--r--sysdeps/mips/sys/ucontext.h74
-rw-r--r--sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h4
-rw-r--r--sysdeps/unix/sysv/linux/arm/sys/ucontext.h36
-rw-r--r--sysdeps/unix/sysv/linux/hppa/sys/ucontext.h6
-rw-r--r--sysdeps/unix/sysv/linux/m68k/sys/ucontext.h44
-rw-r--r--sysdeps/unix/sysv/linux/nios2/sys/ucontext.h4
-rw-r--r--sysdeps/unix/sysv/linux/sh/sys/ucontext.h34
-rw-r--r--sysdeps/unix/sysv/linux/tile/sys/ucontext.h6
12 files changed, 346 insertions, 150 deletions
diff --git a/ChangeLog b/ChangeLog
index 95611f3a1f..d886161b20 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,173 @@
+2017-05-11  Joseph Myers  <joseph@codesourcery.com>
+
+	[BZ #21457]
+	* sysdeps/arm/sys/ucontext.h (R0): Condition on [__USE_MISC].
+	(R1): Likewise.
+	(R2): Likewise.
+	(R3): Likewise.
+	(R4): Likewise.
+	(R5): Likewise.
+	(R6): Likewise.
+	(R7): Likewise.
+	(R8): Likewise.
+	(R9): Likewise.
+	(R10): Likewise.
+	(R11): Likewise.
+	(R12): Likewise.
+	(R13): Likewise.
+	(R14): Likewise.
+	(R15): Likewise.
+	* sysdeps/i386/sys/ucontext.h (REG_GS): Likewise.
+	(REG_FS): Likewise.
+	(REG_ES): Likewise.
+	(REG_DS): Likewise.
+	(REG_EDI): Likewise.
+	(REG_ESI): Likewise.
+	(REG_EBP): Likewise.
+	(REG_ESP): Likewise.
+	(REG_EBX): Likewise.
+	(REG_EDX): Likewise.
+	(REG_ECX): Likewise.
+	(REG_EAX): Likewise.
+	(REG_TRAPNO): Likewise.
+	(REG_ERR): Likewise.
+	(REG_EIP): Likewise.
+	(REG_CS): Likewise.
+	(REG_EFL): Likewise.
+	(REG_UESP): Likewise.
+	(REG_SS): Likewise.
+	* sysdeps/m68k/sys/ucontext.h (R_D0): Likewise.
+	(R_D1): Likewise.
+	(R_D2): Likewise.
+	(R_D3): Likewise.
+	(R_D4): Likewise.
+	(R_D5): Likewise.
+	(R_D6): Likewise.
+	(R_D7): Likewise.
+	(R_A0): Likewise.
+	(R_A1): Likewise.
+	(R_A2): Likewise.
+	(R_A3): Likewise.
+	(R_A4): Likewise.
+	(R_A5): Likewise.
+	(R_A6): Likewise.
+	(R_A7): Likewise.
+	(R_SP): Likewise.
+	(R_PC): Likewise.
+	(R_PS): Likewise.
+	(fpregset_t): Likewise.
+	(MCONTEXT_VERSION): Likewise.
+	* sysdeps/mips/sys/ucontext.h (CTX_R0): Likewise.
+	(CTX_AT): Likewise.
+	(CTX_V0): Likewise.
+	(CTX_V1): Likewise.
+	(CTX_A0): Likewise.
+	(CTX_A1): Likewise.
+	(CTX_A2): Likewise.
+	(CTX_A3): Likewise.
+	(CTX_T0): Likewise.
+	(CTX_T1): Likewise.
+	(CTX_T2): Likewise.
+	(CTX_T3): Likewise.
+	(CTX_T4): Likewise.
+	(CTX_T5): Likewise.
+	(CTX_T6): Likewise.
+	(CTX_T7): Likewise.
+	(CTX_S0): Likewise.
+	(CTX_S1): Likewise.
+	(CTX_S2): Likewise.
+	(CTX_S3): Likewise.
+	(CTX_S4): Likewise.
+	(CTX_S5): Likewise.
+	(CTX_S6): Likewise.
+	(CTX_S7): Likewise.
+	(CTX_T8): Likewise.
+	(CTX_T9): Likewise.
+	(CTX_K0): Likewise.
+	(CTX_K1): Likewise.
+	(CTX_GP): Likewise.
+	(CTX_SP): Likewise.
+	(CTX_S8): Likewise.
+	(CTX_RA): Likewise.
+	(CTX_MDLO): Likewise.
+	(CTX_MDHI): Likewise.
+	(CTX_CAUSE): Likewise.
+	(CTX_EPC): Likewise.
+	* sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h: Condition
+	inclusion of <sys/procfs.h> on [__USE_MISC].
+	(greg_t): Condition on [__USE_MISC].
+	(gregset_t): Likewise.
+	(fpregset_t): Likewise.
+	* sysdeps/unix/sysv/linux/arm/sys/ucontext.h (greg_t): Likewise.
+	(NGREG): Likewise.
+	(gregset_t): Likewise.
+	(REG_R0): Likewise.
+	(REG_R1): Likewise.
+	(REG_R2): Likewise.
+	(REG_R3): Likewise.
+	(REG_R4): Likewise.
+	(REG_R5): Likewise.
+	(REG_R6): Likewise.
+	(REG_R7): Likewise.
+	(REG_R8): Likewise.
+	(REG_R9): Likewise.
+	(REG_R10): Likewise.
+	(REG_R11): Likewise.
+	(REG_R12): Likewise.
+	(REG_R13): Likewise.
+	(REG_R14): Likewise.
+	(REG_R15): Likewise.
+	(struct _libc_fpstate): Likewise.
+	(fpregset_t): Likewise.
+	* sysdeps/unix/sysv/linux/hppa/sys/ucontext.h (NGREG): Likewise.
+	(NFPREG): Likewise.
+	(gregset_t): Likewise.
+	(fpregset_t): Likewise.
+	* sysdeps/unix/sysv/linux/m68k/sys/ucontext.h (R_D0): Likewise.
+	(R_D1): Likewise.
+	(R_D2): Likewise.
+	(R_D3): Likewise.
+	(R_D4): Likewise.
+	(R_D5): Likewise.
+	(R_D6): Likewise.
+	(R_D7): Likewise.
+	(R_A0): Likewise.
+	(R_A1): Likewise.
+	(R_A2): Likewise.
+	(R_A3): Likewise.
+	(R_A4): Likewise.
+	(R_A5): Likewise.
+	(R_A6): Likewise.
+	(R_A7): Likewise.
+	(R_SP): Likewise.
+	(R_PC): Likewise.
+	(R_PS): Likewise.
+	(fpregset_t): Likewise.
+	(MCONTEXT_VERSION): Likewise.
+	* sysdeps/unix/sysv/linux/nios2/sys/ucontext.h (MCONTEXT_VERSION):
+	Likewise.
+	* sysdeps/unix/sysv/linux/sh/sys/ucontext.h (REG_R0): Likewise.
+	(REG_R1): Likewise.
+	(REG_R2): Likewise.
+	(REG_R3): Likewise.
+	(REG_R4): Likewise.
+	(REG_R5): Likewise.
+	(REG_R6): Likewise.
+	(REG_R7): Likewise.
+	(REG_R8): Likewise.
+	(REG_R9): Likewise.
+	(REG_R10): Likewise.
+	(REG_R11): Likewise.
+	(REG_R12): Likewise.
+	(REG_R13): Likewise.
+	(REG_R14): Likewise.
+	(REG_R15): Likewise.
+	* sysdeps/unix/sysv/linux/tile/sys/ucontext.h: Condition inclusion
+	of <arch/abi.h> on [__USE_MISC].
+	(greg_t): Condition on [__USE_MISC].
+	(NGREG): Likewise.
+	(gregset_t): Likewise.
+
 2017-05-11  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 
 	* sysdeps/arm/nptl/bits/pthreadtypes-arch.h
diff --git a/sysdeps/arm/sys/ucontext.h b/sysdeps/arm/sys/ucontext.h
index f2cc43d341..09fe418b3c 100644
--- a/sysdeps/arm/sys/ucontext.h
+++ b/sysdeps/arm/sys/ucontext.h
@@ -37,42 +37,44 @@ typedef int greg_t;
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
 
+#ifdef __USE_MISC
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
   R0 = 0,
-#define R0	R0
+# define R0	R0
   R1 = 1,
-#define R1	R1
+# define R1	R1
   R2 = 2,
-#define R2	R2
+# define R2	R2
   R3 = 3,
-#define R3	R3
+# define R3	R3
   R4 = 4,
-#define R4	R4
+# define R4	R4
   R5 = 5,
-#define R5	R5
+# define R5	R5
   R6 = 6,
-#define R6	R6
+# define R6	R6
   R7 = 7,
-#define R7	R7
+# define R7	R7
   R8 = 8,
-#define R8	R8
+# define R8	R8
   R9 = 9,
-#define R9	R9
+# define R9	R9
   R10 = 10,
-#define R10	R10
+# define R10	R10
   R11 = 11,
-#define R11	R11
+# define R11	R11
   R12 = 12,
-#define R12	R12
+# define R12	R12
   R13 = 13,
-#define R13	R13
+# define R13	R13
   R14 = 14,
-#define R14	R14
+# define R14	R14
   R15 = 15,
-#define R15	R15
+# define R15	R15
 };
+#endif
 
 /* Structure to describe FPU registers.  */
 typedef struct fpregset
diff --git a/sysdeps/i386/sys/ucontext.h b/sysdeps/i386/sys/ucontext.h
index 055d4aaf28..c632e50eba 100644
--- a/sysdeps/i386/sys/ucontext.h
+++ b/sysdeps/i386/sys/ucontext.h
@@ -38,48 +38,50 @@ typedef int greg_t;
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
 
+#ifdef __USE_MISC
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
   REG_GS = 0,
-#define REG_GS	REG_GS
+# define REG_GS	REG_GS
   REG_FS,
-#define REG_FS	REG_FS
+# define REG_FS	REG_FS
   REG_ES,
-#define REG_ES	REG_ES
+# define REG_ES	REG_ES
   REG_DS,
-#define REG_DS	REG_DS
+# define REG_DS	REG_DS
   REG_EDI,
-#define REG_EDI	REG_EDI
+# define REG_EDI	REG_EDI
   REG_ESI,
-#define REG_ESI	REG_ESI
+# define REG_ESI	REG_ESI
   REG_EBP,
-#define REG_EBP	REG_EBP
+# define REG_EBP	REG_EBP
   REG_ESP,
-#define REG_ESP	REG_ESP
+# define REG_ESP	REG_ESP
   REG_EBX,
-#define REG_EBX	REG_EBX
+# define REG_EBX	REG_EBX
   REG_EDX,
-#define REG_EDX	REG_EDX
+# define REG_EDX	REG_EDX
   REG_ECX,
-#define REG_ECX	REG_ECX
+# define REG_ECX	REG_ECX
   REG_EAX,
-#define REG_EAX	REG_EAX
+# define REG_EAX	REG_EAX
   REG_TRAPNO,
-#define REG_TRAPNO	REG_TRAPNO
+# define REG_TRAPNO	REG_TRAPNO
   REG_ERR,
-#define REG_ERR	REG_ERR
+# define REG_ERR	REG_ERR
   REG_EIP,
-#define REG_EIP	REG_EIP
+# define REG_EIP	REG_EIP
   REG_CS,
-#define REG_CS	REG_CS
+# define REG_CS	REG_CS
   REG_EFL,
-#define REG_EFL	REG_EFL
+# define REG_EFL	REG_EFL
   REG_UESP,
-#define REG_UESP	REG_UESP
+# define REG_UESP	REG_UESP
   REG_SS
-#define REG_SS	REG_SS
+# define REG_SS	REG_SS
 };
+#endif
 
 /* Structure to describe FPU registers.  */
 typedef struct fpregset
diff --git a/sysdeps/m68k/sys/ucontext.h b/sysdeps/m68k/sys/ucontext.h
index 1a90751552..cbec1db5d6 100644
--- a/sysdeps/m68k/sys/ucontext.h
+++ b/sysdeps/m68k/sys/ucontext.h
@@ -38,47 +38,48 @@ typedef int greg_t;
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
 
+#ifdef __USE_MISC
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
   R_D0 = 0,
-#define R_D0	R_D0
+# define R_D0	R_D0
   R_D1 = 1,
-#define R_D1	R_D1
+# define R_D1	R_D1
   R_D2 = 2,
-#define R_D2	R_D2
+# define R_D2	R_D2
   R_D3 = 3,
-#define R_D3	R_D3
+# define R_D3	R_D3
   R_D4 = 4,
-#define R_D4	R_D4
+# define R_D4	R_D4
   R_D5 = 5,
-#define R_D5	R_D5
+# define R_D5	R_D5
   R_D6 = 6,
-#define R_D6	R_D6
+# define R_D6	R_D6
   R_D7 = 7,
-#define R_D7	R_D7
+# define R_D7	R_D7
   R_A0 = 8,
-#define R_A0	R_A0
+# define R_A0	R_A0
   R_A1 = 9,
-#define R_A1	R_A1
+# define R_A1	R_A1
   R_A2 = 10,
-#define R_A2	R_A2
+# define R_A2	R_A2
   R_A3 = 11,
-#define R_A3	R_A3
+# define R_A3	R_A3
   R_A4 = 12,
-#define R_A4	R_A4
+# define R_A4	R_A4
   R_A5 = 13,
-#define R_A5	R_A5
+# define R_A5	R_A5
   R_A6 = 14,
-#define R_A6	R_A6
+# define R_A6	R_A6
   R_A7 = 15,
-#define R_A7	R_A7
+# define R_A7	R_A7
   R_SP = 15,
-#define R_SP	R_SP
+# define R_SP	R_SP
   R_PC = 16,
-#define R_PC	R_PC
+# define R_PC	R_PC
   R_PS = 17
-#define R_PS	R_PS
+# define R_PS	R_PS
 };
 
 /* Structure to describe FPU registers.  */
@@ -89,6 +90,7 @@ typedef struct fpregset
   int f_fpiaddr;
   int f_fpregs[8][3];
 } fpregset_t;
+#endif
 
 /* Context to describe whole processor state.  */
 typedef struct
@@ -97,7 +99,9 @@ typedef struct
   gregset_t gregs;
 } mcontext_t;
 
-#define MCONTEXT_VERSION 1
+#ifdef __USE_MISC
+# define MCONTEXT_VERSION 1
+#endif
 
 /* Userlevel context.  */
 typedef struct ucontext
diff --git a/sysdeps/mips/sys/ucontext.h b/sysdeps/mips/sys/ucontext.h
index 348b7ef41b..137246f961 100644
--- a/sysdeps/mips/sys/ucontext.h
+++ b/sysdeps/mips/sys/ucontext.h
@@ -44,82 +44,84 @@ typedef __uint64_t greg_t;
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
 
+#ifdef __USE_MISC
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
   CTX_R0 = 0,
-#define CTX_R0	CTX_R0
+# define CTX_R0	CTX_R0
   CTX_AT = 1,
-#define CTX_AT	CTX_AT
+# define CTX_AT	CTX_AT
   CTX_V0 = 2,
-#define CTX_V0	CTX_V0
+# define CTX_V0	CTX_V0
   CTX_V1 = 3,
-#define CTX_V1	CTX_V1
+# define CTX_V1	CTX_V1
   CTX_A0 = 4,
-#define CTX_A0	CTX_A0
+# define CTX_A0	CTX_A0
   CTX_A1 = 5,
-#define CTX_A1	CTX_A1
+# define CTX_A1	CTX_A1
   CTX_A2 = 6,
-#define CTX_A2	CTX_A2
+# define CTX_A2	CTX_A2
   CTX_A3 = 7,
-#define CTX_A3	CTX_A3
+# define CTX_A3	CTX_A3
   CTX_T0 = 8,
-#define CTX_T0	CTX_T0
+# define CTX_T0	CTX_T0
   CTX_T1 = 9,
-#define CTX_T1	CTX_T1
+# define CTX_T1	CTX_T1
   CTX_T2 = 10,
-#define CTX_T2	CTX_T2
+# define CTX_T2	CTX_T2
   CTX_T3 = 11,
-#define CTX_T3	CTX_T3
+# define CTX_T3	CTX_T3
   CTX_T4 = 12,
-#define CTX_T4	CTX_T4
+# define CTX_T4	CTX_T4
   CTX_T5 = 13,
-#define CTX_T5	CTX_T5
+# define CTX_T5	CTX_T5
   CTX_T6 = 14,
-#define CTX_T6	CTX_T6
+# define CTX_T6	CTX_T6
   CTX_T7 = 15,
-#define CTX_T7	CTX_T7
+# define CTX_T7	CTX_T7
   CTX_S0 = 16,
-#define CTX_S0	CTX_S0
+# define CTX_S0	CTX_S0
   CTX_S1 = 17,
-#define CTX_S1	CTX_S1
+# define CTX_S1	CTX_S1
   CTX_S2 = 18,
-#define CTX_S2	CTX_S2
+# define CTX_S2	CTX_S2
   CTX_S3 = 19,
-#define CTX_S3	CTX_S3
+# define CTX_S3	CTX_S3
   CTX_S4 = 20,
-#define CTX_S4	CTX_S4
+# define CTX_S4	CTX_S4
   CTX_S5 = 21,
-#define CTX_S5	CTX_S5
+# define CTX_S5	CTX_S5
   CTX_S6 = 22,
-#define CTX_S6	CTX_S6
+# define CTX_S6	CTX_S6
   CTX_S7 = 23,
-#define CTX_S7	CTX_S7
+# define CTX_S7	CTX_S7
   CTX_T8 = 24,
-#define CTX_T8	CTX_T8
+# define CTX_T8	CTX_T8
   CTX_T9 = 25,
-#define CTX_T9	CTX_T9
+# define CTX_T9	CTX_T9
   CTX_K0 = 26,
-#define CTX_K0	CTX_K0
+# define CTX_K0	CTX_K0
   CTX_K1 = 27,
-#define CTX_K1	CTX_K1
+# define CTX_K1	CTX_K1
   CTX_GP = 28,
-#define CTX_GP	CTX_GP
+# define CTX_GP	CTX_GP
   CTX_SP = 29,
-#define CTX_SP	CTX_SP
+# define CTX_SP	CTX_SP
   CTX_S8 = 30,
-#define CTX_S8	CTX_S8
+# define CTX_S8	CTX_S8
   CTX_RA = 31,
-#define CTX_RA	CTX_RA
+# define CTX_RA	CTX_RA
   CTX_MDLO = 32,
-#define CTX_MDLO	CTX_MDLO
+# define CTX_MDLO	CTX_MDLO
   CTX_MDHI = 33,
-#define CTX_MDHI	CTX_MDHI
+# define CTX_MDHI	CTX_MDHI
   CTX_CAUSE = 34,
-#define CTX_CAUSE	CTX_CAUSE
+# define CTX_CAUSE	CTX_CAUSE
   CTX_EPC = 35,
-#define CTX_EPC	CTX_EPC
+# define CTX_EPC	CTX_EPC
 };
+#endif
 
 /* Structure to describe FPU registers.  */
 typedef struct fpregset
diff --git a/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h b/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h
index 0bf101ada5..536404dd71 100644
--- a/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/aarch64/sys/ucontext.h
@@ -29,7 +29,8 @@
 #include <bits/sigcontext.h>
 #include <bits/sigstack.h>
 
-#include <sys/procfs.h>
+#ifdef __USE_MISC
+# include <sys/procfs.h>
 
 
 typedef elf_greg_t greg_t;
@@ -39,6 +40,7 @@ typedef elf_gregset_t gregset_t;
 
 /* Structure to describe FPU registers.  */
 typedef elf_fpregset_t	fpregset_t;
+#endif
 
 /* Context to describe whole processor state.  This only describes
    the core registers; coprocessor registers get saved elsewhere
diff --git a/sysdeps/unix/sysv/linux/arm/sys/ucontext.h b/sysdeps/unix/sysv/linux/arm/sys/ucontext.h
index cdd39654eb..aedeccdabe 100644
--- a/sysdeps/unix/sysv/linux/arm/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/arm/sys/ucontext.h
@@ -29,10 +29,11 @@
 #include <bits/sigstack.h>
 
 
+#ifdef __USE_MISC
 typedef int greg_t;
 
 /* Number of general registers.  */
-#define NGREG	18
+# define NGREG	18
 
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
@@ -41,37 +42,37 @@ typedef greg_t gregset_t[NGREG];
 enum
 {
   REG_R0 = 0,
-#define REG_R0	REG_R0
+# define REG_R0	REG_R0
   REG_R1 = 1,
-#define REG_R1	REG_R1
+# define REG_R1	REG_R1
   REG_R2 = 2,
-#define REG_R2	REG_R2
+# define REG_R2	REG_R2
   REG_R3 = 3,
-#define REG_R3	REG_R3
+# define REG_R3	REG_R3
   REG_R4 = 4,
-#define REG_R4	REG_R4
+# define REG_R4	REG_R4
   REG_R5 = 5,
-#define REG_R5	REG_R5
+# define REG_R5	REG_R5
   REG_R6 = 6,
-#define REG_R6	REG_R6
+# define REG_R6	REG_R6
   REG_R7 = 7,
-#define REG_R7	REG_R7
+# define REG_R7	REG_R7
   REG_R8 = 8,
-#define REG_R8	REG_R8
+# define REG_R8	REG_R8
   REG_R9 = 9,
-#define REG_R9	REG_R9
+# define REG_R9	REG_R9
   REG_R10 = 10,
-#define REG_R10	REG_R10
+# define REG_R10	REG_R10
   REG_R11 = 11,
-#define REG_R11	REG_R11
+# define REG_R11	REG_R11
   REG_R12 = 12,
-#define REG_R12	REG_R12
+# define REG_R12	REG_R12
   REG_R13 = 13,
-#define REG_R13	REG_R13
+# define REG_R13	REG_R13
   REG_R14 = 14,
-#define REG_R14	REG_R14
+# define REG_R14	REG_R14
   REG_R15 = 15
-#define REG_R15	REG_R15
+# define REG_R15	REG_R15
 };
 
 struct _libc_fpstate
@@ -93,6 +94,7 @@ struct _libc_fpstate
 };
 /* Structure to describe FPU registers.  */
 typedef struct _libc_fpstate fpregset_t;
+#endif
 
 /* Context to describe whole processor state.  This only describes
    the core registers; coprocessor registers get saved elsewhere
diff --git a/sysdeps/unix/sysv/linux/hppa/sys/ucontext.h b/sysdeps/unix/sysv/linux/hppa/sys/ucontext.h
index 8faac50433..31eb77e01b 100644
--- a/sysdeps/unix/sysv/linux/hppa/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/hppa/sys/ucontext.h
@@ -29,12 +29,13 @@
 #include <bits/sigstack.h>
 
 
+#ifdef __USE_MISC
 /* Type for general register.  */
 typedef unsigned long int greg_t;
 
 /* Number of general registers.  */
-#define NGREG	80
-#define NFPREG	32
+# define NGREG	80
+# define NFPREG	32
 
 /* Container for all general registers.  */
 typedef struct gregset
@@ -50,6 +51,7 @@ typedef struct fpregset
   {
     double fp_dregs[32];
   } fpregset_t;
+#endif
 
 /* Context to describe whole processor state.  */
 typedef struct sigcontext mcontext_t;
diff --git a/sysdeps/unix/sysv/linux/m68k/sys/ucontext.h b/sysdeps/unix/sysv/linux/m68k/sys/ucontext.h
index 977b4ee6cd..3c5dce5b73 100644
--- a/sysdeps/unix/sysv/linux/m68k/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/m68k/sys/ucontext.h
@@ -38,48 +38,50 @@ typedef int greg_t;
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
 
+#ifdef __USE_MISC
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
   R_D0 = 0,
-#define R_D0	R_D0
+# define R_D0	R_D0
   R_D1 = 1,
-#define R_D1	R_D1
+# define R_D1	R_D1
   R_D2 = 2,
-#define R_D2	R_D2
+# define R_D2	R_D2
   R_D3 = 3,
-#define R_D3	R_D3
+# define R_D3	R_D3
   R_D4 = 4,
-#define R_D4	R_D4
+# define R_D4	R_D4
   R_D5 = 5,
-#define R_D5	R_D5
+# define R_D5	R_D5
   R_D6 = 6,
-#define R_D6	R_D6
+# define R_D6	R_D6
   R_D7 = 7,
-#define R_D7	R_D7
+# define R_D7	R_D7
   R_A0 = 8,
-#define R_A0	R_A0
+# define R_A0	R_A0
   R_A1 = 9,
-#define R_A1	R_A1
+# define R_A1	R_A1
   R_A2 = 10,
-#define R_A2	R_A2
+# define R_A2	R_A2
   R_A3 = 11,
-#define R_A3	R_A3
+# define R_A3	R_A3
   R_A4 = 12,
-#define R_A4	R_A4
+# define R_A4	R_A4
   R_A5 = 13,
-#define R_A5	R_A5
+# define R_A5	R_A5
   R_A6 = 14,
-#define R_A6	R_A6
+# define R_A6	R_A6
   R_A7 = 15,
-#define R_A7	R_A7
+# define R_A7	R_A7
   R_SP = 15,
-#define R_SP	R_SP
+# define R_SP	R_SP
   R_PC = 16,
-#define R_PC	R_PC
+# define R_PC	R_PC
   R_PS = 17
-#define R_PS	R_PS
+# define R_PS	R_PS
 };
+#endif
 
 /* Structure to describe FPU registers.  */
 typedef struct fpregset
@@ -102,7 +104,9 @@ typedef struct
   fpregset_t fpregs;
 } mcontext_t;
 
-#define MCONTEXT_VERSION 2
+#ifdef __USE_MISC
+# define MCONTEXT_VERSION 2
+#endif
 
 /* Userlevel context.  */
 typedef struct ucontext
diff --git a/sysdeps/unix/sysv/linux/nios2/sys/ucontext.h b/sysdeps/unix/sysv/linux/nios2/sys/ucontext.h
index 6701d7ed94..3b0a615abe 100644
--- a/sysdeps/unix/sysv/linux/nios2/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/nios2/sys/ucontext.h
@@ -32,7 +32,9 @@
 
 /* These definitions must be in sync with the kernel.  */
 
-#define MCONTEXT_VERSION 2
+#ifdef __USE_MISC
+# define MCONTEXT_VERSION 2
+#endif
 
 /* Context to describe whole processor state.  */
 typedef struct mcontext
diff --git a/sysdeps/unix/sysv/linux/sh/sys/ucontext.h b/sysdeps/unix/sysv/linux/sh/sys/ucontext.h
index 9fa479c151..5c6a5e4a7a 100644
--- a/sysdeps/unix/sysv/linux/sh/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/sh/sys/ucontext.h
@@ -37,42 +37,44 @@ typedef int greg_t;
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
 
+#ifdef __USE_MISC
 /* Number of each register is the `gregset_t' array.  */
 enum
 {
   REG_R0 = 0,
-#define REG_R0	REG_R0
+# define REG_R0	REG_R0
   REG_R1 = 1,
-#define REG_R1	REG_R1
+# define REG_R1	REG_R1
   REG_R2 = 2,
-#define REG_R2	REG_R2
+# define REG_R2	REG_R2
   REG_R3 = 3,
-#define REG_R3	REG_R3
+# define REG_R3	REG_R3
   REG_R4 = 4,
-#define REG_R4	REG_R4
+# define REG_R4	REG_R4
   REG_R5 = 5,
-#define REG_R5	REG_R5
+# define REG_R5	REG_R5
   REG_R6 = 6,
-#define REG_R6	REG_R6
+# define REG_R6	REG_R6
   REG_R7 = 7,
-#define REG_R7	REG_R7
+# define REG_R7	REG_R7
   REG_R8 = 8,
-#define REG_R8	REG_R8
+# define REG_R8	REG_R8
   REG_R9 = 9,
-#define REG_R9	REG_R9
+# define REG_R9	REG_R9
   REG_R10 = 10,
-#define REG_R10	REG_R10
+# define REG_R10	REG_R10
   REG_R11 = 11,
-#define REG_R11	REG_R11
+# define REG_R11	REG_R11
   REG_R12 = 12,
-#define REG_R12	REG_R12
+# define REG_R12	REG_R12
   REG_R13 = 13,
-#define REG_R13	REG_R13
+# define REG_R13	REG_R13
   REG_R14 = 14,
-#define REG_R14	REG_R14
+# define REG_R14	REG_R14
   REG_R15 = 15,
-#define REG_R15	REG_R15
+# define REG_R15	REG_R15
 };
+#endif
 
 typedef int freg_t;
 
diff --git a/sysdeps/unix/sysv/linux/tile/sys/ucontext.h b/sysdeps/unix/sysv/linux/tile/sys/ucontext.h
index 247f2976fb..95e6dd68f5 100644
--- a/sysdeps/unix/sysv/linux/tile/sys/ucontext.h
+++ b/sysdeps/unix/sysv/linux/tile/sys/ucontext.h
@@ -27,18 +27,20 @@
 #include <bits/sigcontext.h>
 #include <bits/sigstack.h>
 
+#ifdef __USE_MISC
 /* Get register type and register names. */
-#include <arch/abi.h>
+# include <arch/abi.h>
 
 
 /* Type for general register.  */
 typedef uint_reg_t greg_t;
 
 /* Number of general registers.  Must agree with <asm/ptrace.h>. */
-#define NGREG	64
+# define NGREG	64
 
 /* Container for all general registers.  */
 typedef greg_t gregset_t[NGREG];
+#endif
 
 #ifdef __USE_GNU
 /* Names for interesting registers in the `gregset_t' array.  */