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-rw-r--r--ChangeLog10
-rw-r--r--NEWS2
-rw-r--r--sysdeps/i386/fpu/e_pow.S9
-rw-r--r--sysdeps/i386/fpu/e_powf.S5
-rw-r--r--sysdeps/i386/fpu/e_powl.S9
-rw-r--r--sysdeps/x86_64/fpu/e_powl.S3
6 files changed, 36 insertions, 2 deletions
diff --git a/ChangeLog b/ChangeLog
index 574e07e6c3..ce26384afb 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,13 @@
+2013-11-16  Joseph Myers  <joseph@codesourcery.com>
+
+	[BZ #16167]
+	* sysdeps/i386/fpu/e_pow.S (__ieee754_pow): Check for first
+	argument being NaN and avoid computations with second argument in
+	that case.
+	* sysdeps/i386/fpu/e_powf.S (__ieee754_powf): Likewise.
+	* sysdeps/i386/fpu/e_powl.S (__ieee754_powl): Likewise.
+	* sysdeps/x86_64/fpu/e_powl.S (__ieee754_powl): Likewise.
+
 2013-11-15  Arun Kumar Pyasi <arun@chitwanix.com>
 
 	* locale/iso-639.def: Add Chitwani Tharu (the).
diff --git a/NEWS b/NEWS
index 37c2390b58..e3effb64ac 100644
--- a/NEWS
+++ b/NEWS
@@ -18,7 +18,7 @@ Version 2.19
   15887, 15890, 15892, 15893, 15895, 15897, 15905, 15909, 15917, 15919,
   15921, 15923, 15939, 15948, 15963, 15966, 15985, 15988, 15997, 16032,
   16034, 16036, 16037, 16041, 16071, 16072, 16074, 16078, 16103, 16112,
-  16143, 16150, 16151, 16153, 16172.
+  16143, 16150, 16151, 16153, 16167, 16172.
 
 * CVE-2012-4412 The strcoll implementation caches indices and rules for
   large collation sequences to optimize multiple passes.  This cache
diff --git a/sysdeps/i386/fpu/e_pow.S b/sysdeps/i386/fpu/e_pow.S
index 109c395934..835c39b7bd 100644
--- a/sysdeps/i386/fpu/e_pow.S
+++ b/sysdeps/i386/fpu/e_pow.S
@@ -98,6 +98,9 @@ ENTRY(__ieee754_pow)
 	cmpb	$0x05, %ah
 	je	15f		// x is ħinf
 
+	cmpb	$0x01, %ah
+	je	32f		// x is NaN
+
 	fxch			// y : x
 
 	/* fistpll raises invalid exception for |y| >= 1L<<63.  */
@@ -166,6 +169,12 @@ ENTRY(__ieee754_pow)
 	ret
 
 	cfi_adjust_cfa_offset (8)
+32:	addl	$8, %esp
+	cfi_adjust_cfa_offset (-8)
+	fstp	%st(1)
+	ret
+
+	cfi_adjust_cfa_offset (8)
 	.align ALIGNARG(4)
 2:	// y is a large integer (absolute value at least 1L<<10), but
 	// may be odd unless at least 1L<<64.  So it may be necessary
diff --git a/sysdeps/i386/fpu/e_powf.S b/sysdeps/i386/fpu/e_powf.S
index 7fad90f6cb..90d3d0ca6a 100644
--- a/sysdeps/i386/fpu/e_powf.S
+++ b/sysdeps/i386/fpu/e_powf.S
@@ -95,6 +95,9 @@ ENTRY(__ieee754_powf)
 	cmpb	$0x05, %ah
 	je	15f		// x is ħinf
 
+	cmpb	$0x01, %ah
+	je	32f		// x is NaN
+
 	fxch			// y : x
 
 	/* fistpl raises invalid exception for |y| >= 1L<<31.  */
@@ -180,7 +183,7 @@ ENTRY(__ieee754_powf)
 	f2xm1			// 2^fract(y*log2(x))-1 : int(y*log2(x))
 	faddl	MO(one)		// 2^fract(y*log2(x)) : int(y*log2(x))
 	fscale			// 2^fract(y*log2(x))*2^int(y*log2(x)) : int(y*log2(x))
-	addl	$4, %esp
+32:	addl	$4, %esp
 	cfi_adjust_cfa_offset (-4)
 	fstp	%st(1)		// 2^fract(y*log2(x))*2^int(y*log2(x))
 	ret
diff --git a/sysdeps/i386/fpu/e_powl.S b/sysdeps/i386/fpu/e_powl.S
index 3c23117c39..91e22c8a29 100644
--- a/sysdeps/i386/fpu/e_powl.S
+++ b/sysdeps/i386/fpu/e_powl.S
@@ -104,6 +104,9 @@ ENTRY(__ieee754_powl)
 	cmpb	$0x05, %ah
 	je	15f		// x is ħinf
 
+	cmpb	$0x01, %ah
+	je	32f		// x is NaN
+
 	fxch			// y : x
 
 	/* fistpll raises invalid exception for |y| >= 1L<<63.  */
@@ -188,6 +191,12 @@ ENTRY(__ieee754_powl)
 	ret
 
 	cfi_adjust_cfa_offset (8)
+32:	addl	$8, %esp
+	cfi_adjust_cfa_offset (-8)
+	fstp	%st(1)
+	ret
+
+	cfi_adjust_cfa_offset (8)
 	.align ALIGNARG(4)
 2:	// y is a large integer (absolute value at least 8), but
 	// may be odd unless at least 1L<<64.  So it may be necessary
diff --git a/sysdeps/x86_64/fpu/e_powl.S b/sysdeps/x86_64/fpu/e_powl.S
index e10172674e..590223b60c 100644
--- a/sysdeps/x86_64/fpu/e_powl.S
+++ b/sysdeps/x86_64/fpu/e_powl.S
@@ -96,6 +96,9 @@ ENTRY(__ieee754_powl)
 	cmpb	$0x05, %ah
 	je	15f		// x is ħinf
 
+	cmpb	$0x01, %ah
+	je	31f		// x is NaN
+
 	fxch			// y : x
 
 	/* fistpll raises invalid exception for |y| >= 1L<<63.  */