diff options
-rw-r--r-- | ChangeLog | 6 | ||||
-rw-r--r-- | NEWS | 1 | ||||
-rw-r--r-- | sysdeps/x86/cpu-features.c | 6 |
3 files changed, 13 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog index c6dfc5e677..17a9232cdf 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2018-10-23 Adhemerval Zanella <adhemerval.zanella@linaro.org> + + [BZ #23709] + * sysdeps/x86/cpu-features.c (init_cpu_features): Set TSX bits + independently of other flags. + 2017-12-18 Joseph Myers <joseph@codesourcery.com> * nptl/tst-attr3.c: Include <libc-diag.h>. diff --git a/NEWS b/NEWS index f6c9a1412c..d99732fe06 100644 --- a/NEWS +++ b/NEWS @@ -156,6 +156,7 @@ The following bugs are resolved with this release: [23459] COMMON_CPUID_INDEX_80000001 isn't populated for Intel processors [23562] signal: Use correct type for si_band in siginfo_t [23579] libc: Errors misreported in preadv2 + [23709] Fix CPU string flags for Haswell-type CPUs Version 2.26 diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index a66d468b20..b3a5f4b26a 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -297,7 +297,13 @@ init_cpu_features (struct cpu_features *cpu_features) | bit_arch_Fast_Unaligned_Copy | bit_arch_Prefer_PMINUB_for_stringop); break; + } + /* Disable TSX on some Haswell processors to avoid TSX on kernels that + weren't updated with the latest microcode package (which disables + broken feature by default). */ + switch (model) + { case 0x3f: /* Xeon E7 v3 with stepping >= 4 has working TSX. */ if (stepping >= 4) |