diff options
-rw-r--r-- | ChangeLog | 8 | ||||
-rw-r--r-- | manual/tunables.texi | 2 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 1 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 3 |
4 files changed, 13 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog index 25a644fdec..2e51ea4c8b 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,11 @@ +2019-02-01 Feng Xue <fxue@os.amperecomputing.com> + + * manual/tunables.texi (Tunable glibc.cpu.name): Add emag. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): + Add emag. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_EMAG): + New macro. + 2019-02-01 Stefan Liebler <stli@linux.ibm.com> * posix/tst-spawn do_test(): Move waitpid before posix_spawn. diff --git a/manual/tunables.texi b/manual/tunables.texi index af820820e0..749cabff1b 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -360,7 +360,7 @@ This tunable is specific to powerpc, powerpc64 and powerpc64le. The @code{glibc.cpu.name=xxx} tunable allows the user to tell @theglibc{} to assume that the CPU is @code{xxx} where xxx may have one of these values: @code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99}, -@code{thunderx2t99p1}, @code{ares}. +@code{thunderx2t99p1}, @code{ares}, @code{emag}. This tunable is specific to aarch64. @end deftp diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index 4243ceda07..28dfcef8a9 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -37,6 +37,7 @@ static struct cpu_list cpu_list[] = { {"thunderx2t99p1", 0x420F5160}, {"phecda", 0x680F0000}, {"ares", 0x411FD0C0}, + {"emag", 0x503F0001}, {"generic", 0x0} }; diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 6f8b35ff09..127391138d 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -54,6 +54,9 @@ #define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ && MIDR_PARTNUM(midr) == 0xd0c) +#define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \ + && MIDR_PARTNUM(midr) == 0x000) + struct cpu_features { uint64_t midr_el1; |