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authorTorvald Riegel <triegel@redhat.com>2014-10-18 01:01:58 +0200
committerTorvald Riegel <triegel@redhat.com>2014-10-31 23:26:22 +0100
commit7f981fc24a9156dba8cfe5e7eb8e87fa9d793f2a (patch)
tree10ccc3e9173f0b5a94a9209ab86d6e591b45fafe /sysdeps
parentd6f373d21b19565838cb9848c15b8070f2fe1305 (diff)
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powerpc: Change atomic_write_barrier to have release semantics.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/powerpc/bits/atomic.h1
-rw-r--r--sysdeps/powerpc/powerpc32/bits/atomic.h2
-rw-r--r--sysdeps/powerpc/powerpc64/bits/atomic.h1
3 files changed, 3 insertions, 1 deletions
diff --git a/sysdeps/powerpc/bits/atomic.h b/sysdeps/powerpc/bits/atomic.h
index 2ffba48d55..f312676b45 100644
--- a/sysdeps/powerpc/bits/atomic.h
+++ b/sysdeps/powerpc/bits/atomic.h
@@ -77,7 +77,6 @@ typedef uintmax_t uatomic_max_t;
 #endif
 
 #define atomic_full_barrier()	__asm ("sync" ::: "memory")
-#define atomic_write_barrier()	__asm ("eieio" ::: "memory")
 
 #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval)	      \
   ({									      \
diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h
index 7613bdc485..a3dd09cd9a 100644
--- a/sysdeps/powerpc/powerpc32/bits/atomic.h
+++ b/sysdeps/powerpc/powerpc32/bits/atomic.h
@@ -117,6 +117,7 @@
 # ifndef UP
 #  define __ARCH_REL_INSTR	"lwsync"
 # endif
+# define atomic_write_barrier()	__asm ("lwsync" ::: "memory")
 #else
 /*
  * Older powerpc32 processors don't support the new "light weight"
@@ -124,6 +125,7 @@
  * for all powerpc32 applications.
  */
 # define atomic_read_barrier()	__asm ("sync" ::: "memory")
+# define atomic_write_barrier()	__asm ("sync" ::: "memory")
 #endif
 
 /*
diff --git a/sysdeps/powerpc/powerpc64/bits/atomic.h b/sysdeps/powerpc/powerpc64/bits/atomic.h
index 527fe7c133..ed26b7253e 100644
--- a/sysdeps/powerpc/powerpc64/bits/atomic.h
+++ b/sysdeps/powerpc/powerpc64/bits/atomic.h
@@ -234,6 +234,7 @@
 #ifndef UP
 # define __ARCH_REL_INSTR	"lwsync"
 #endif
+#define atomic_write_barrier()	__asm ("lwsync" ::: "memory")
 
 /*
  * Include the rest of the atomic ops macros which are common to both