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authorLiubov Dmitrieva <liubov.dmitrieva@intel.com>2013-06-14 20:46:15 +0200
committerAndreas Jaeger <aj@suse.de>2013-06-14 20:46:15 +0200
commitd086fc7ba0d4b58c9db901780cb8adf415e1f2b5 (patch)
tree1008d0651263454a304dd23acf1d7df7d8ac0c2f /sysdeps
parent747ef469ffc9c9179ca9d76854167925b4e44346 (diff)
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Set fast unaligned load flag for new Intel microarchitecture
I have small patch for new Intel Silvermont machines.

http://newsroom.intel.com/community/intel_newsroom/blog/2013/05/06/intel-launches-low-power-high-performance-silvermont-microarchitecture

I checked this on my machine and see that strcpy, ... unaligned
versions are faster than ssse3 versions.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/x86_64/multiarch/init-arch.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/sysdeps/x86_64/multiarch/init-arch.c b/sysdeps/x86_64/multiarch/init-arch.c
index 7daaf46099..9524aeea18 100644
--- a/sysdeps/x86_64/multiarch/init-arch.c
+++ b/sysdeps/x86_64/multiarch/init-arch.c
@@ -78,6 +78,13 @@ __init_cpu_features (void)
 	      __cpu_features.feature[index_Slow_BSF] |= bit_Slow_BSF;
 	      break;
 
+	    case 0x37:
+	      /* Unaligned load versions are faster than SSSE3
+		 on Silvermont.  */
+	      __cpu_features.feature[index_Fast_Unaligned_Load]
+		|= bit_Fast_Unaligned_Load;
+	      break;
+
 	    default:
 	      /* Unknown family 0x06 processors.  Assuming this is one
 		 of Core i3/i5/i7 processors if AVX is available.  */