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authorWilco Dijkstra <wdijkstr@arm.com>2014-10-24 13:07:17 +0000
committerWilco Dijkstra <wdijkstr@arm.com>2014-10-24 13:07:17 +0000
commita7b00c110132b4cb64a7f6b7b23a1c0ebbe54cd3 (patch)
tree1b3e38b674587e4acb75d693fb5703aed8cc4788 /sysdeps
parent3a84f1a6516e3b22507f9c03fbd36a5559c3df94 (diff)
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Cleanup feenableexcept to use the same logic as the ARM version. No functional changes.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/aarch64/fpu/feenablxcpt.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/sysdeps/aarch64/fpu/feenablxcpt.c b/sysdeps/aarch64/fpu/feenablxcpt.c
index 70e413c9f6..763248f4e1 100644
--- a/sysdeps/aarch64/fpu/feenablxcpt.c
+++ b/sysdeps/aarch64/fpu/feenablxcpt.c
@@ -24,14 +24,9 @@ feenableexcept (int excepts)
 {
   fpu_control_t fpcr;
   fpu_control_t fpcr_new;
-  int original_excepts;
 
   _FPU_GETCW (fpcr);
-
-  original_excepts = (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
-
   excepts &= FE_ALL_EXCEPT;
-
   fpcr_new = fpcr | (excepts << FE_EXCEPT_SHIFT);
 
   if (fpcr != fpcr_new)
@@ -50,5 +45,5 @@ feenableexcept (int excepts)
 	return -1;
     }
 
-  return original_excepts;
+  return (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
 }