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author | Aurelien Jarno <aurelien@aurel32.net> | 2022-01-17 19:41:40 +0100 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2022-01-17 19:46:24 +0100 |
commit | 1d401d1fccb85046402089268b94d86d822070e6 (patch) | |
tree | efb108c3f4cc34a7cea7e1380b9bb38fe502f433 /sysdeps | |
parent | 6890b8a3ae40ab9d4c96024ab95b04816fcc8a4a (diff) | |
download | glibc-1d401d1fccb85046402089268b94d86d822070e6.tar.gz glibc-1d401d1fccb85046402089268b94d86d822070e6.tar.xz glibc-1d401d1fccb85046402089268b94d86d822070e6.zip |
x86: use default cache size if it cannot be determined [BZ #28784]
In some cases (e.g QEMU, non-Intel/AMD CPU) the cache information can not be retrieved and the corresponding values are set to 0. Commit 2d651eb9265d ("x86: Move x86 processor cache info to cpu_features") changed the behaviour in such case by defining the __x86_shared_cache_size and __x86_data_cache_size variables to 0 instead of using the default values. This cause an issue with the i686 SSE2 optimized bzero/routine which assumes that the cache size is at least 128 bytes, and otherwise tries to zero/set the whole address space minus 128 bytes. Fix that by restoring the original code to only update __x86_shared_cache_size and __x86_data_cache_size variables if the corresponding cache sizes are not zero. Fixes bug 28784 Fixes commit 2d651eb9265d Reviewed-by: H.J. Lu <hjl.tools@gmail.com> (cherry picked from commit c242fcce06e3102ca663b2f992611d0bda4f2668)
Diffstat (limited to 'sysdeps')
-rw-r--r-- | sysdeps/x86/cacheinfo.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/sysdeps/x86/cacheinfo.h b/sysdeps/x86/cacheinfo.h index 41d2c81369..63f36877e3 100644 --- a/sysdeps/x86/cacheinfo.h +++ b/sysdeps/x86/cacheinfo.h @@ -61,14 +61,20 @@ init_cacheinfo (void) long int data = cpu_features->data_cache_size; /* Round data cache size to multiple of 256 bytes. */ data = data & ~255L; - __x86_data_cache_size_half = data / 2; - __x86_data_cache_size = data; + if (data > 0) + { + __x86_data_cache_size_half = data / 2; + __x86_data_cache_size = data; + } long int shared = cpu_features->shared_cache_size; /* Round shared cache size to multiple of 256 bytes. */ shared = shared & ~255L; - __x86_shared_cache_size_half = shared / 2; - __x86_shared_cache_size = shared; + if (shared > 0) + { + __x86_shared_cache_size_half = shared / 2; + __x86_shared_cache_size = shared; + } __x86_shared_non_temporal_threshold = cpu_features->non_temporal_threshold; |