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| author | Ulrich Drepper <drepper@redhat.com> | 2004-12-17 05:16:26 +0000 |
|---|---|---|
| committer | Ulrich Drepper <drepper@redhat.com> | 2004-12-17 05:16:26 +0000 |
| commit | fb9d5c7388cad80712efccff2612f39874ecec20 (patch) | |
| tree | f4aef01a123fbe0bbf2b32784b246c4795dabf44 /sysdeps | |
| parent | 9aa191b86c70d82f59f67b31a6e025ab60e0100a (diff) | |
| download | glibc-fb9d5c7388cad80712efccff2612f39874ecec20.tar.gz glibc-fb9d5c7388cad80712efccff2612f39874ecec20.tar.xz glibc-fb9d5c7388cad80712efccff2612f39874ecec20.zip | |
Update.
2004-12-16 Ulrich Drepper <drepper@redhat.com> * tst-context1.c (stacks): Use bigger stack size.
Diffstat (limited to 'sysdeps')
| -rw-r--r-- | sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S | 8 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S b/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S index e87f507cae..61e0f8ed11 100644 --- a/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S +++ b/sysdeps/unix/sysv/linux/powerpc/powerpc64/getcontext.S @@ -275,17 +275,17 @@ ENTRY(__getcontext) ld r5,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r5) # else ld r5,0(r5) /* Load extern _dl_hwcap. */ -# endif +# endif la r10,(SIGCONTEXT_V_RESERVE+8)(r3) la r9,(SIGCONTEXT_V_RESERVE+24)(r3) - + andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16) - + clrrdi r10,r10,4 beq L(has_no_vec) clrrdi r9,r9,4 mr r5,r10 /* Capture *v_regs value in r5. */ - + stvx v0,0,r10 stvx v1,0,r9 addi r10,r10,32 diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S b/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S index 00070e5a75..f99df951a2 100644 --- a/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S +++ b/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S @@ -401,12 +401,12 @@ ENTRY(__swapcontext) #endif la r10,(SIGCONTEXT_V_RESERVE+8)(r3) la r9,(SIGCONTEXT_V_RESERVE+24)(r3) - + andis. r8,r8,(PPC_FEATURE_HAS_ALTIVEC >> 16) clrrdi r10,r10,4 beq L(has_no_vec) - + clrrdi r9,r9,4 mr r8,r10 /* Capture *v_regs value in r5. */ @@ -493,7 +493,7 @@ ENTRY(__swapcontext) mfvscr v0 mfspr r0,VRSAVE stvx v0,0,r10 - stw r0,0(9) + stw r0,0(r9) L(has_no_vec): /* |