about summary refs log tree commit diff
path: root/sysdeps/x86_64/multiarch/strcmp.S
diff options
context:
space:
mode:
authorAndreas Schwab <schwab@suse.de>2014-10-21 11:09:19 +0200
committerAndreas Schwab <schwab@suse.de>2014-10-27 10:44:28 +0100
commit3574f2fdf3827d4953d19a89063e517263b5df85 (patch)
treecdbe317761f280507d91b213133bf1cde3eb2951 /sysdeps/x86_64/multiarch/strcmp.S
parent461a7b1e4551ee9018f7542c21ff32b0f9872e7f (diff)
downloadglibc-3574f2fdf3827d4953d19a89063e517263b5df85.tar.gz
glibc-3574f2fdf3827d4953d19a89063e517263b5df85.tar.xz
glibc-3574f2fdf3827d4953d19a89063e517263b5df85.zip
Fix misdetected Slow_SSE4_2 cpu feature bit (bug 17501)
Diffstat (limited to 'sysdeps/x86_64/multiarch/strcmp.S')
-rw-r--r--sysdeps/x86_64/multiarch/strcmp.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/sysdeps/x86_64/multiarch/strcmp.S b/sysdeps/x86_64/multiarch/strcmp.S
index f3e0ca1259..bd71714e0b 100644
--- a/sysdeps/x86_64/multiarch/strcmp.S
+++ b/sysdeps/x86_64/multiarch/strcmp.S
@@ -91,10 +91,10 @@ ENTRY(STRCMP)
 1:
 #ifdef USE_AS_STRCMP
 	leaq	__strcmp_sse2_unaligned(%rip), %rax
-	testl   $bit_Fast_Unaligned_Load, __cpu_features+CPUID_OFFSET+index_Fast_Unaligned_Load(%rip)
+	testl   $bit_Fast_Unaligned_Load, __cpu_features+FEATURE_OFFSET+index_Fast_Unaligned_Load(%rip)
 	jnz     3f
 #else
-	testl	$bit_Slow_SSE4_2, __cpu_features+CPUID_OFFSET+index_Slow_SSE4_2(%rip)
+	testl	$bit_Slow_SSE4_2, __cpu_features+FEATURE_OFFSET+index_Slow_SSE4_2(%rip)
 	jnz	2f
 	leaq	STRCMP_SSE42(%rip), %rax
 	testl	$bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
@@ -120,7 +120,7 @@ ENTRY(__strcasecmp)
 	testl	$bit_AVX_Usable, __cpu_features+FEATURE_OFFSET+index_AVX_Usable(%rip)
 	jnz	3f
 #  endif
-	testl	$bit_Slow_SSE4_2, __cpu_features+CPUID_OFFSET+index_Slow_SSE4_2(%rip)
+	testl	$bit_Slow_SSE4_2, __cpu_features+FEATURE_OFFSET+index_Slow_SSE4_2(%rip)
 	jnz	2f
 	leaq	__strcasecmp_sse42(%rip), %rax
 	testl	$bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
@@ -146,7 +146,7 @@ ENTRY(__strncasecmp)
 	testl	$bit_AVX_Usable, __cpu_features+FEATURE_OFFSET+index_AVX_Usable(%rip)
 	jnz	3f
 #  endif
-	testl	$bit_Slow_SSE4_2, __cpu_features+CPUID_OFFSET+index_Slow_SSE4_2(%rip)
+	testl	$bit_Slow_SSE4_2, __cpu_features+FEATURE_OFFSET+index_Slow_SSE4_2(%rip)
 	jnz	2f
 	leaq	__strncasecmp_sse42(%rip), %rax
 	testl	$bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)