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| author | Liubov Dmitrieva <liubov.dmitrieva@intel.com> | 2011-09-05 21:34:03 -0400 |
|---|---|---|
| committer | Ulrich Drepper <drepper@gmail.com> | 2011-09-05 21:34:03 -0400 |
| commit | a5f524e47929e270816c604fbb167a339334a73f (patch) | |
| tree | 322c81be8673662e4c10b084c68dee427ef1606f /sysdeps/x86_64/multiarch/strchr.S | |
| parent | d96de9634a334af16c0ac711074c15ac1762b23c (diff) | |
| download | glibc-a5f524e47929e270816c604fbb167a339334a73f.tar.gz glibc-a5f524e47929e270816c604fbb167a339334a73f.tar.xz glibc-a5f524e47929e270816c604fbb167a339334a73f.zip | |
Add Atom-optimized strchr and strrchr for x86-64
Diffstat (limited to 'sysdeps/x86_64/multiarch/strchr.S')
| -rw-r--r-- | sysdeps/x86_64/multiarch/strchr.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sysdeps/x86_64/multiarch/strchr.S b/sysdeps/x86_64/multiarch/strchr.S index 71845a35fe..97a6057bb3 100644 --- a/sysdeps/x86_64/multiarch/strchr.S +++ b/sysdeps/x86_64/multiarch/strchr.S @@ -33,7 +33,11 @@ ENTRY(strchr) testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip) jz 2f leaq __strchr_sse42(%rip), %rax -2: ret + ret +2: testl $bit_Slow_BSF, __cpu_features+FEATURE_OFFSET+index_Slow_BSF(%rip) + jz 3f + leaq __strchr_sse2_no_bsf(%rip), %rax +3: ret END(strchr) |