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| author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2024-02-08 10:08:40 -0300 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2024-02-13 08:49:43 -0800 |
| commit | 491e55beab7457ed310a4a47496f4a333c5d1032 (patch) | |
| tree | 8ebab1cf64eb413c6eb325466b3de4ea76d643a0 /sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S | |
| parent | 272708884cb750f12f5c74a00e6620c19dc6d567 (diff) | |
| download | glibc-491e55beab7457ed310a4a47496f4a333c5d1032.tar.gz glibc-491e55beab7457ed310a4a47496f4a333c5d1032.tar.xz glibc-491e55beab7457ed310a4a47496f4a333c5d1032.zip | |
x86: Expand the comment on when REP STOSB is used on memset
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Diffstat (limited to 'sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S')
| -rw-r--r-- | sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S index 9984c3ca0f..97839a2248 100644 --- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S @@ -21,7 +21,9 @@ 2. If size is less than VEC, use integer register stores. 3. If size is from VEC_SIZE to 2 * VEC_SIZE, use 2 VEC stores. 4. If size is from 2 * VEC_SIZE to 4 * VEC_SIZE, use 4 VEC stores. - 5. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with + 5. On machines ERMS feature, if size is greater or equal than + __x86_rep_stosb_threshold then REP STOSB will be used. + 6. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with 4 VEC stores and store 4 * VEC at a time until done. */ #include <sysdep.h> |