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author | H.J. Lu <hjl.tools@gmail.com> | 2019-07-24 14:48:33 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2019-07-24 14:48:43 -0700 |
commit | 7e681561a3aea7aa8f21fb031a7c778147dfdf5b (patch) | |
tree | 9d70b934aeae381ec82fa7b21481728bbf0ad59a /sysdeps/x86_64/fpu | |
parent | 82c664ed751f52a3074a9d6d366e87086f10b2f4 (diff) | |
download | glibc-7e681561a3aea7aa8f21fb031a7c778147dfdf5b.tar.gz glibc-7e681561a3aea7aa8f21fb031a7c778147dfdf5b.tar.xz glibc-7e681561a3aea7aa8f21fb031a7c778147dfdf5b.zip |
x86-64: Compile branred.c with -mprefer-vector-width=128 [BZ #24603]
When compiled with -O3 and AVX, GCC 8 and 9 optimize some loops in sysdeps/ieee754/dbl-64/branred.c with 256-bit vector instructions, which leads to store forward stall: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90579 There is no easy fix in compiler. This patch limits vector width to 128 bits to work around this issue. It improves performance of sin and cos by more than 40% on Skylake compiled with -O3 -march=skylake. Tested with GCC 7/8/9 on x86-64. [BZ #24603] * sysdeps/x86_64/configure.ac: Check if -mprefer-vector-width=128 works. * sysdeps/x86_64/configure: Regenerated. * sysdeps/x86_64/fpu/Makefile (CFLAGS-branred.c): New. Set to -mprefer-vector-width=128 if supported.
Diffstat (limited to 'sysdeps/x86_64/fpu')
-rw-r--r-- | sysdeps/x86_64/fpu/Makefile | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/Makefile b/sysdeps/x86_64/fpu/Makefile index 2b7d69bb50..74b14ba096 100644 --- a/sysdeps/x86_64/fpu/Makefile +++ b/sysdeps/x86_64/fpu/Makefile @@ -237,3 +237,15 @@ CFLAGS-test-float-libmvec-sincosf-avx512.c = -DREQUIRE_AVX512F CFLAGS-test-float-libmvec-sincosf-avx512-main.c = $(libmvec-sincos-cflags) $(float-vlen16-arch-ext-cflags) endif endif + +ifeq ($(subdir)$(config-cflags-mprefer-vector-width),mathyes) +# When compiled with -O3 -march=skylake, GCC 8 and 9 optimize some loops +# in branred.c with 256-bit vector instructions, which leads to store +# forward stall: +# +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90579 +# +# Limit vector width to 128 bits to work around this issue. It improves +# performance of sin and cos by more than 40% on Skylake. +CFLAGS-branred.c = -mprefer-vector-width=128 +endif |