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authorAndrew Senkevich <andrew.senkevich@intel.com>2015-06-18 20:11:27 +0300
committerAndrew Senkevich <andrew.senkevich@intel.com>2015-06-18 20:11:27 +0300
commita6336cc446a7ed682cb9dbc47cc56ebf9f9a4229 (patch)
tree3b89c96ee406327a8ad942cb1f4923fe33c0558e /sysdeps/x86_64/fpu/svml_s_sincosf_data.h
parentc9a8c526acd185176e486bee4624039740f8c435 (diff)
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Vector sincosf for x86_64 and tests.
Here is implementation of vectorized sincosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * NEWS: Mention addition of x86_64 vector sincosf.
    * math/test-float-vlen16.h: Added wrapper for sincosf tests.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added sincosf SIMD declaration.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
    * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf4_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.h: New file.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 3 argument wrappers.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: : Vector sincosf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
Diffstat (limited to 'sysdeps/x86_64/fpu/svml_s_sincosf_data.h')
-rw-r--r--sysdeps/x86_64/fpu/svml_s_sincosf_data.h61
1 files changed, 61 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/svml_s_sincosf_data.h b/sysdeps/x86_64/fpu/svml_s_sincosf_data.h
new file mode 100644
index 0000000000..432511776a
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_sincosf_data.h
@@ -0,0 +1,61 @@
+/* Offsets for data table for function sincosf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef S_SINCOSF_DATA_H
+#define S_SINCOSF_DATA_H
+
+#define __dT                          	0
+#define __sAbsMask                    	4096
+#define __sRangeReductionVal          	4160
+#define __sRangeVal                   	4224
+#define __sS1                         	4288
+#define __sS2                         	4352
+#define __sC1                         	4416
+#define __sC2                         	4480
+#define __iIndexMask                  	4544
+#define __i2pK_1                      	4608
+#define __sSignMask                   	4672
+#define __sPI1                        	4736
+#define __sPI2                        	4800
+#define __sPI3                        	4864
+#define __sPI4                        	4928
+#define __sPI1_FMA                    	4992
+#define __sPI2_FMA                    	5056
+#define __sPI3_FMA                    	5120
+#define __sA3                         	5184
+#define __sA5                         	5248
+#define __sA7                         	5312
+#define __sA9                         	5376
+#define __sA5_FMA                     	5440
+#define __sA7_FMA                     	5504
+#define __sA9_FMA                     	5568
+#define __sInvPI                      	5632
+#define __sRShifter                   	5696
+#define __sHalfPI                     	5760
+#define __sOneHalf                    	5824
+
+.macro float_vector offset value
+.if .-__svml_ssincos_data != \offset
+.err
+.endif
+.rept 16
+.long \value
+.endr
+.endm
+
+#endif