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authorAndrew Senkevich <andrew.senkevich@intel.com>2015-06-18 17:04:07 +0300
committerAndrew Senkevich <andrew.senkevich@intel.com>2015-06-18 17:04:07 +0300
commit8aa92022e2e7cb5470b6e252020140c05b8013ed (patch)
treedfedc663faa6a67fee4bd9a65ec2227fc0e4c534 /sysdeps/x86_64/fpu/svml_s_powf_data.h
parent2f3184451dc9daf8c15be10f190071409d93232e (diff)
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Vector powf for x86_64 and tests.
Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for powf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * math/test-float-vlen16.h: Fixed 2 argument macro.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * NEWS: Mention addition of x86_64 vector powf.
Diffstat (limited to 'sysdeps/x86_64/fpu/svml_s_powf_data.h')
-rw-r--r--sysdeps/x86_64/fpu/svml_s_powf_data.h76
1 files changed, 76 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/svml_s_powf_data.h b/sysdeps/x86_64/fpu/svml_s_powf_data.h
new file mode 100644
index 0000000000..d847368e4b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf_data.h
@@ -0,0 +1,76 @@
+/* Offsets for data table for function powf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef S_POWF_DATA_H
+#define S_POWF_DATA_H
+
+#define _Log2Rcp_lookup                -4218496
+#define _NMINNORM                     	0
+#define _NMAXVAL                      	64
+#define _INF                          	128
+#define _ABSMASK                      	192
+#define _DOMAINRANGE                  	256
+#define _Log_HA_table                 	320
+#define _Log_LA_table                 	8576
+#define _poly_coeff_1                 	12736
+#define _poly_coeff_2                 	12800
+#define _poly_coeff_3                 	12864
+#define _poly_coeff_4                 	12928
+#define _ExpMask                      	12992
+#define _Two10                        	13056
+#define _MinNorm                      	13120
+#define _MaxNorm                      	13184
+#define _HalfMask                     	13248
+#define _One                          	13312
+#define _L2H                          	13376
+#define _L2L                          	13440
+#define _Threshold                    	13504
+#define _Bias                         	13568
+#define _Bias1                        	13632
+#define _L2                           	13696
+#define _dInfs                        	13760
+#define _dOnes                        	13824
+#define _dZeros                       	13888
+#define __dbT                         	13952
+#define __dbInvLn2                    	30400
+#define __dbShifter                   	30464
+#define __dbHALF                      	30528
+#define __dbC1                        	30592
+#define __lbLOWKBITS                  	30656
+#define __iAbsMask                    	30720
+#define __iDomainRange                	30784
+
+.macro double_vector offset value
+.if .-__svml_spow_data != \offset
+.err
+.endif
+.rept 8
+.quad \value
+.endr
+.endm
+
+.macro float_vector offset value
+.if .-__svml_spow_data != \offset
+.err
+.endif
+.rept 16
+.long \value
+.endr
+.endm
+
+#endif