about summary refs log tree commit diff
path: root/sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S
diff options
context:
space:
mode:
authorAndrew Senkevich <andrew.senkevich@intel.com>2015-06-09 18:29:47 +0300
committerAndrew Senkevich <andrew.senkevich@intel.com>2015-06-09 18:29:47 +0300
commit04f496d6025753058bdd071fd711e9f56df149a7 (patch)
tree21b047c3aadb643a0eb86e277e496146bd9b5f84 /sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S
parent24a2718f595bc11dc6abb31303ceb8fdcb664f2f (diff)
downloadglibc-04f496d6025753058bdd071fd711e9f56df149a7.tar.gz
glibc-04f496d6025753058bdd071fd711e9f56df149a7.tar.xz
glibc-04f496d6025753058bdd071fd711e9f56df149a7.zip
Vector cosf for x86_64.
Here is implementation of vectorized cosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/svml_s_cosf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.h: New file.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for cosf.
    * NEWS: Mention addition of x86_64 vector cosf.
Diffstat (limited to 'sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S')
-rw-r--r--sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S25
1 files changed, 25 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S b/sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S
new file mode 100644
index 0000000000..a443fd28ad
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S
@@ -0,0 +1,25 @@
+/* Function cosf vectorized in AVX ISA as wrapper to SSE4 ISA version.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+        .text
+ENTRY (_ZGVcN8v_cosf)
+WRAPPER_IMPL_AVX _ZGVbN4v_cosf
+END (_ZGVcN8v_cosf)