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author | Ulrich Drepper <drepper@gmail.com> | 2011-10-16 20:58:17 -0400 |
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committer | Ulrich Drepper <drepper@gmail.com> | 2011-10-16 20:58:17 -0400 |
commit | ad0f5cad15f1c76faf3843b3e189dead2c05cfcc (patch) | |
tree | d3ed2cb9df7536e17a275d08bdb09b2840fee5e5 /sysdeps/x86_64/fpu/multiarch/s_ceilf.S | |
parent | aac13307d6879af0f46e6b26895244d063c50db5 (diff) | |
download | glibc-ad0f5cad15f1c76faf3843b3e189dead2c05cfcc.tar.gz glibc-ad0f5cad15f1c76faf3843b3e189dead2c05cfcc.tar.xz glibc-ad0f5cad15f1c76faf3843b3e189dead2c05cfcc.zip |
Use rounds{s,d} for x86 rint, ceil, floor
Diffstat (limited to 'sysdeps/x86_64/fpu/multiarch/s_ceilf.S')
-rw-r--r-- | sysdeps/x86_64/fpu/multiarch/s_ceilf.S | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/multiarch/s_ceilf.S b/sysdeps/x86_64/fpu/multiarch/s_ceilf.S new file mode 100644 index 0000000000..65ce252f6f --- /dev/null +++ b/sysdeps/x86_64/fpu/multiarch/s_ceilf.S @@ -0,0 +1,40 @@ +/* Copyright (C) 2011 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Ulrich Drepper <drepper@gmail.come>, 2011. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#include <machine/asm.h> +#include <init-arch.h> + + +ENTRY(__ceilf) + .type __ceilf, @gnu_indirect_function + call __get_cpu_features@plt + movq %rax, %rdx + leaq __ceilf_sse41(%rip), %rax + testl $bit_SSE4_1, CPUID_OFFSET+index_SSE4_1(%rdx) + jnz 2f + leaq __ceilf_c(%rip), %rax +2: ret +END(__ceilf) +weak_alias (__ceilf, ceilf) + + +ENTRY(__ceilf_sse41) + roundss $2, %xmm0, %xmm0 + ret +END(__ceilf_sse41) |