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| author | Ulrich Drepper <drepper@gmail.com> | 2011-04-03 09:32:31 -0400 |
|---|---|---|
| committer | Ulrich Drepper <drepper@gmail.com> | 2011-04-03 09:32:31 -0400 |
| commit | dedc7c7b053accd847a99b84563583d4a68d2545 (patch) | |
| tree | ce8380c2b5836062b6f90e737d98c8d82540c6f7 /sysdeps/x86_64/cacheinfo.c | |
| parent | 955ce8cf2d884b3419c058de562174046daad95b (diff) | |
| download | glibc-dedc7c7b053accd847a99b84563583d4a68d2545.tar.gz glibc-dedc7c7b053accd847a99b84563583d4a68d2545.tar.xz glibc-dedc7c7b053accd847a99b84563583d4a68d2545.zip | |
Fix typo in cache information table for x86-{32,64}.
Diffstat (limited to 'sysdeps/x86_64/cacheinfo.c')
| -rw-r--r-- | sysdeps/x86_64/cacheinfo.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c index bd4be3d2df..fdba6efef1 100644 --- a/sysdeps/x86_64/cacheinfo.c +++ b/sysdeps/x86_64/cacheinfo.c @@ -130,7 +130,7 @@ static const struct intel_02_cache_info { 0xdc, 12, 64, M(_SC_LEVEL3_CACHE_SIZE), 2097152 }, { 0xdd, 12, 64, M(_SC_LEVEL3_CACHE_SIZE), 4194304 }, { 0xde, 12, 64, M(_SC_LEVEL3_CACHE_SIZE), 8388608 }, - { 0xe3, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 2097152 }, + { 0xe2, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 2097152 }, { 0xe3, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 4194304 }, { 0xe4, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 8388608 }, { 0xea, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 12582912 }, |