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| author | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-17 16:10:51 +0300 |
|---|---|---|
| committer | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-17 16:10:51 +0300 |
| commit | 1663be053d50c06bb0f971c87d41a7b83f96fe15 (patch) | |
| tree | 4bfbbfac7a83c1e52b2a7ab23dd9677f5cab4267 /sysdeps/x86 | |
| parent | 9c02f663f6b387b3905b629ffe584c9abf2030dc (diff) | |
| download | glibc-1663be053d50c06bb0f971c87d41a7b83f96fe15.tar.gz glibc-1663be053d50c06bb0f971c87d41a7b83f96fe15.tar.xz glibc-1663be053d50c06bb0f971c87d41a7b83f96fe15.zip | |
Vector expf for x86_64 and tests.
Here is implementation of vectorized expf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
redirections for expf.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: New file.
* sysdeps/x86_64/fpu/svml_s_expf16_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_expf4_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_expf8_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_expf8_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_s_expf_data.S: New file.
* sysdeps/x86_64/fpu/svml_s_expf_data.h: New file.
* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector expf tests.
* sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
* NEWS: Mention addition of x86_64 vector expf.
Diffstat (limited to 'sysdeps/x86')
| -rw-r--r-- | sysdeps/x86/fpu/bits/math-vector.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h index 9a353bc62a..3b7158952c 100644 --- a/sysdeps/x86/fpu/bits/math-vector.h +++ b/sysdeps/x86/fpu/bits/math-vector.h @@ -42,6 +42,8 @@ # define __DECL_SIMD_logf __DECL_SIMD_x86_64 # undef __DECL_SIMD_exp # define __DECL_SIMD_exp __DECL_SIMD_x86_64 +# undef __DECL_SIMD_expf +# define __DECL_SIMD_expf __DECL_SIMD_x86_64 /* Workaround to exclude unnecessary symbol aliases in libmvec while GCC creates the vector names based on scalar asm name. @@ -59,6 +61,10 @@ __asm__ ("_ZGVbN2v___exp_finite = _ZGVbN2v_exp"); __asm__ ("_ZGVcN4v___exp_finite = _ZGVcN4v_exp"); __asm__ ("_ZGVdN4v___exp_finite = _ZGVdN4v_exp"); __asm__ ("_ZGVeN8v___exp_finite = _ZGVeN8v_exp"); +__asm__ ("_ZGVbN4v___expf_finite = _ZGVbN4v_expf"); +__asm__ ("_ZGVcN8v___expf_finite = _ZGVcN8v_expf"); +__asm__ ("_ZGVdN8v___expf_finite = _ZGVdN8v_expf"); +__asm__ ("_ZGVeN16v___expf_finite = _ZGVeN16v_expf"); # endif #endif |