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author | H.J. Lu <hjl.tools@gmail.com> | 2012-06-18 11:43:51 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2012-06-18 11:43:51 -0700 |
commit | a2f34833b1042d5d8eeb263b4cf4caaea138c4ad (patch) | |
tree | b488842849a2e5c81dce044e856b6a08672223f2 /sysdeps/x86 | |
parent | 3ee947b1244a4562e8934b98f39e17f98d2309da (diff) | |
download | glibc-a2f34833b1042d5d8eeb263b4cf4caaea138c4ad.tar.gz glibc-a2f34833b1042d5d8eeb263b4cf4caaea138c4ad.tar.xz glibc-a2f34833b1042d5d8eeb263b4cf4caaea138c4ad.zip |
Use x86-64 fpu_control.h for i386 and x86_64
Diffstat (limited to 'sysdeps/x86')
-rw-r--r-- | sysdeps/x86/fpu_control.h | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/sysdeps/x86/fpu_control.h b/sysdeps/x86/fpu_control.h new file mode 100644 index 0000000000..605302c09b --- /dev/null +++ b/sysdeps/x86/fpu_control.h @@ -0,0 +1,109 @@ +/* FPU control word bits. x86 version. + Copyright (C) 1993-2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Olaf Flebbe. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _FPU_CONTROL_H +#define _FPU_CONTROL_H 1 + +/* Note that this file sets on x86-64 only the x87 FPU, it does not + touch the SSE unit. */ + +/* Here is the dirty part. Set up your 387 through the control word + * (cw) register. + * + * 15-13 12 11-10 9-8 7-6 5 4 3 2 1 0 + * | reserved | IC | RC | PC | reserved | PM | UM | OM | ZM | DM | IM + * + * IM: Invalid operation mask + * DM: Denormalized operand mask + * ZM: Zero-divide mask + * OM: Overflow mask + * UM: Underflow mask + * PM: Precision (inexact result) mask + * + * Mask bit is 1 means no interrupt. + * + * PC: Precision control + * 11 - round to extended precision + * 10 - round to double precision + * 00 - round to single precision + * + * RC: Rounding control + * 00 - rounding to nearest + * 01 - rounding down (toward - infinity) + * 10 - rounding up (toward + infinity) + * 11 - rounding toward zero + * + * IC: Infinity control + * That is for 8087 and 80287 only. + * + * The hardware default is 0x037f which we use. + */ + +#include <features.h> + +/* masking of interrupts */ +#define _FPU_MASK_IM 0x01 +#define _FPU_MASK_DM 0x02 +#define _FPU_MASK_ZM 0x04 +#define _FPU_MASK_OM 0x08 +#define _FPU_MASK_UM 0x10 +#define _FPU_MASK_PM 0x20 + +/* precision control */ +#define _FPU_EXTENDED 0x300 /* libm requires double extended precision. */ +#define _FPU_DOUBLE 0x200 +#define _FPU_SINGLE 0x0 + +/* rounding control */ +#define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */ +#define _FPU_RC_DOWN 0x400 +#define _FPU_RC_UP 0x800 +#define _FPU_RC_ZERO 0xC00 + +#define _FPU_RESERVED 0xF0C0 /* Reserved bits in cw */ + + +/* The fdlibm code requires strict IEEE double precision arithmetic, + and no interrupts for exceptions, rounding to nearest. */ + +#define _FPU_DEFAULT 0x037f + +/* IEEE: same as above. */ +#define _FPU_IEEE 0x037f + +/* Type of the control word. */ +typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__HI__))); + +/* Macros for accessing the hardware control word. "*&" is used to + work around a bug in older versions of GCC. __volatile__ is used + to support combination of writing the control register and reading + it back. Without __volatile__, the old value may be used for reading + back under compiler optimization. + + Note that the use of these macros is not sufficient anymore with + recent hardware nor on x86-64. Some floating point operations are + executed in the SSE/SSE2 engines which have their own control and + status register. */ +#define _FPU_GETCW(cw) __asm__ __volatile__ ("fnstcw %0" : "=m" (*&cw)) +#define _FPU_SETCW(cw) __asm__ __volatile__ ("fldcw %0" : : "m" (*&cw)) + +/* Default control word set at startup. */ +extern fpu_control_t __fpu_control; + +#endif /* fpu_control.h */ |