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| author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2021-06-22 16:41:28 -0300 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2021-06-24 09:57:46 -0300 |
| commit | e3e3eb0a2ea615c272cec5f47ba9f243ccdaf386 (patch) | |
| tree | 67861e0d5cab0df49dc7a76527317b793d2ef047 /sysdeps/x86/include | |
| parent | ea26ff03227d7cacef5de6036df57734373449b4 (diff) | |
| download | glibc-e3e3eb0a2ea615c272cec5f47ba9f243ccdaf386.tar.gz glibc-e3e3eb0a2ea615c272cec5f47ba9f243ccdaf386.tar.xz glibc-e3e3eb0a2ea615c272cec5f47ba9f243ccdaf386.zip | |
x86: Fix tst-cpu-features-cpuinfo on Ryzen 9 (BZ #27873)
AMD define different flags for IRPB, IBRS, and STIPBP [1], so new x86_64_cpu are added and IBRS_IBPB is only tested for Intel. The SSDB is also defined and implemented different on AMD [2], and also a new AMD_SSDB flag is added. It should map to the cpuinfo 'ssdb' on recent AMD cpus. It fixes tst-cpu-features-cpuinfo and tst-cpu-features-cpuinfo-static on recent AMD cpus. Checked on x86_64-linux-gnu on AMD Ryzen 9 5900X. [1] https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf [2] https://bugzilla.kernel.org/show_bug.cgi?id=199889 Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Diffstat (limited to 'sysdeps/x86/include')
| -rw-r--r-- | sysdeps/x86/include/cpu-features.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index d042a2ebef..4f1c4ee402 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -289,6 +289,10 @@ enum /* EBX. */ #define bit_cpu_WBNOINVD (1u << 9) +#define bit_cpu_AMD_IBPB (1u << 12) +#define bit_cpu_AMD_IBRS (1u << 14) +#define bit_cpu_AMD_STIBP (1u << 15) +#define bit_cpu_AMD_SSBD (1u << 24) /* CPUID_INDEX_7_ECX_1. */ @@ -519,6 +523,10 @@ enum /* EBX. */ #define index_cpu_WBNOINVD CPUID_INDEX_80000008 +#define index_cpu_AMD_IBPB CPUID_INDEX_80000008 +#define index_cpu_AMD_IBRS CPUID_INDEX_80000008 +#define index_cpu_AMD_STIBP CPUID_INDEX_80000008 +#define index_cpu_AMD_SSBD CPUID_INDEX_80000008 /* CPUID_INDEX_7_ECX_1. */ @@ -749,6 +757,10 @@ enum /* EBX. */ #define reg_WBNOINVD ebx +#define reg_AMD_IBPB ebx +#define reg_AMD_IBRS ebx +#define reg_AMD_STIBP ebx +#define reg_AMD_SSBD ebx /* CPUID_INDEX_7_ECX_1. */ |