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author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2020-03-09 10:21:51 -0300 |
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committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2020-03-30 10:52:32 -0300 |
commit | 4a30b6109c119feeb95cf154382057fbf757d4da (patch) | |
tree | f831b87a18b75289d343c939cfd86e1c41fcbddf /sysdeps/x86/fpu/bits | |
parent | 5f34491510efe37d094c1fca66c7404002cdcdc5 (diff) | |
download | glibc-4a30b6109c119feeb95cf154382057fbf757d4da.tar.gz glibc-4a30b6109c119feeb95cf154382057fbf757d4da.tar.xz glibc-4a30b6109c119feeb95cf154382057fbf757d4da.zip |
x86: Remove feraiseexcept optimization
Similar to fenvinline.h removal, this kind of optimization is better implemented by the compiler. Also newer code avoid setting exceptions directly (for instance the code to make new logf, log2f and powf implementatation to now support SVID compat). The BZ#94194 [1] the corresponding GCC bug for adding replacements for these on x86. Checked on x86_64-linux-gnu and i686-linux-gnu. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94194
Diffstat (limited to 'sysdeps/x86/fpu/bits')
-rw-r--r-- | sysdeps/x86/fpu/bits/fenv.h | 54 |
1 files changed, 0 insertions, 54 deletions
diff --git a/sysdeps/x86/fpu/bits/fenv.h b/sysdeps/x86/fpu/bits/fenv.h index eb78eb4b2d..6cfa5678eb 100644 --- a/sysdeps/x86/fpu/bits/fenv.h +++ b/sysdeps/x86/fpu/bits/fenv.h @@ -114,57 +114,3 @@ femode_t; /* Default floating-point control modes. */ # define FE_DFL_MODE ((const femode_t *) -1L) #endif - - -#ifdef __USE_EXTERN_INLINES -__BEGIN_DECLS - -/* Optimized versions. */ -#ifndef _LIBC -extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); -#endif -__extern_always_inline void -__NTH (__feraiseexcept_invalid_divbyzero (int __excepts)) -{ - if ((FE_INVALID & __excepts) != 0) - { - /* One example of an invalid operation is 0.0 / 0.0. */ - float __f = 0.0; - -# ifdef __SSE_MATH__ - __asm__ __volatile__ ("divss %0, %0 " : : "x" (__f)); -# else - __asm__ __volatile__ ("fdiv %%st, %%st(0); fwait" - : "=t" (__f) : "0" (__f)); -# endif - (void) &__f; - } - if ((FE_DIVBYZERO & __excepts) != 0) - { - float __f = 1.0; - float __g = 0.0; - -# ifdef __SSE_MATH__ - __asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g)); -# else - __asm__ __volatile__ ("fdivp %%st, %%st(1); fwait" - : "=t" (__f) : "0" (__f), "u" (__g) : "st(1)"); -# endif - (void) &__f; - } -} -__extern_inline int -__NTH (feraiseexcept (int __excepts)) -{ - if (__builtin_constant_p (__excepts) - && (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0) - { - __feraiseexcept_invalid_divbyzero (__excepts); - return 0; - } - - return __feraiseexcept_renamed (__excepts); -} - -__END_DECLS -#endif |