diff options
| author | H.J. Lu <hjl.tools@gmail.com> | 2020-09-16 05:27:32 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-09-17 05:18:36 -0700 |
| commit | 94cd37ebb293321115a36a422b091fdb72d2fb08 (patch) | |
| tree | 0905e08ce20879fb7bb168796bebb839f530aef2 /sysdeps/x86/dl-cet.c | |
| parent | f2c679d4b2c73a95f437c705f960a4af1fa23498 (diff) | |
| download | glibc-94cd37ebb293321115a36a422b091fdb72d2fb08.tar.gz glibc-94cd37ebb293321115a36a422b091fdb72d2fb08.tar.xz glibc-94cd37ebb293321115a36a422b091fdb72d2fb08.zip | |
x86: Use HAS_CPU_FEATURE with IBT and SHSTK [BZ #26625]
commit 04bba1e5d84b6fd8d3a3b006bc240cd5d241ee30
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Aug 5 13:51:56 2020 -0700
x86: Set CPU usable feature bits conservatively [BZ #26552]
Set CPU usable feature bits only for CPU features which are usable in
user space and whose usability can be detected from user space, excluding
features like FSGSBASE whose enable bit can only be checked in the kernel.
no longer turns on the usable bits of IBT and SHSTK since we don't know
if IBT and SHSTK are usable until much later. Use HAS_CPU_FEATURE to
check if the processor supports IBT and SHSTK.
Diffstat (limited to 'sysdeps/x86/dl-cet.c')
| -rw-r--r-- | sysdeps/x86/dl-cet.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index 03572f7af6..5524b66038 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -74,10 +74,10 @@ dl_cet_check (struct link_map *m, const char *program) GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK */ - enable_ibt &= (CPU_FEATURE_USABLE (IBT) + enable_ibt &= (HAS_CPU_FEATURE (IBT) && (enable_ibt_type == cet_always_on || (m->l_cet & lc_ibt) != 0)); - enable_shstk &= (CPU_FEATURE_USABLE (SHSTK) + enable_shstk &= (HAS_CPU_FEATURE (SHSTK) && (enable_shstk_type == cet_always_on || (m->l_cet & lc_shstk) != 0)); } |