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authorH.J. Lu <hjl.tools@gmail.com>2017-08-14 05:54:25 -0700
committerH.J. Lu <hjl.tools@gmail.com>2017-08-14 05:54:38 -0700
commit73322d5ff6ad71c65f875095c4801771cff9ab2d (patch)
tree6dfe6b618b2501adfed46076a4d06cc3b4b0b5e0 /sysdeps/x86/cpu-tunables.c
parentdbc303ef76503793b4744004984d248346602479 (diff)
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x86: Add IBT/SHSTK bits to cpu-features
Add IBT/SHSTK bits to cpu-features for Shadow Stack in Intel Control-flow
Enforcement Technology (CET) instructions:

https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

	* sysdeps/x86/cpu-features.h (bit_cpu_BIT): New.
	(bit_cpu_SHSTK): Likewise.
	(index_cpu_IBT): Likewise.
	(index_cpu_SHSTK): Likewise.
	(reg_IBT): Likewise.
	(reg_SHSTK): Likewise.
	* sysdeps/x86/cpu-tunables.c (TUNABLE_CALLBACK (set_hwcaps)):
	Handle index_cpu_IBT and index_cpu_SHSTK.
Diffstat (limited to 'sysdeps/x86/cpu-tunables.c')
-rw-r--r--sysdeps/x86/cpu-tunables.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c
index 872dd1267f..0ab708cca8 100644
--- a/sysdeps/x86/cpu-tunables.c
+++ b/sysdeps/x86/cpu-tunables.c
@@ -164,6 +164,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, CX8, 3);
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, FMA, 3);
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, HTT, 3);
+	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, IBT, 3);
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, RTM, 3);
 	    }
 	  break;
@@ -186,6 +187,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
 	    {
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, LZCNT, 5);
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, MOVBE, 5);
+	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SHSTK, 5);
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSSE3, 5);
 	    }
 	  break;