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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-06-25 15:12:57 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-06-26 06:53:05 -0700 |
| commit | 4fdd4d41a17dda26c854ed935658154a17d4b906 (patch) | |
| tree | a5fbd905db96a1ef71ecef14140f19c59f96aac7 /sysdeps/x86/cpu-features.c | |
| parent | 6e540caa21616d5ec5511fafb22819204525138e (diff) | |
| download | glibc-4fdd4d41a17dda26c854ed935658154a17d4b906.tar.gz glibc-4fdd4d41a17dda26c854ed935658154a17d4b906.tar.xz glibc-4fdd4d41a17dda26c854ed935658154a17d4b906.zip | |
x86: Detect Intel Advanced Matrix Extensions
Intel Advanced Matrix Extensions (Intel AMX) is a new programming paradigm consisting of two components: a set of 2-dimensional registers (tiles) representing sub-arrays from a larger 2-dimensional memory image, and accelerators able to operate on tiles. Intel AMX is an extensible architecture. New accelerators can be added and the existing accelerator may be enhanced to provide higher performance. The initial features are AMX-BF16, AMX-TILE and AMX-INT8, which are usable only if the operating system supports both XTILECFG state and XTILEDATA state. Add AMX-BF16, AMX-TILE and AMX-INT8 support to HAS_CPU_FEATURE and CPU_FEATURE_USABLE.
Diffstat (limited to 'sysdeps/x86/cpu-features.c')
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 79bc0d7216..c351bdd54a 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -239,6 +239,24 @@ get_common_indices (struct cpu_features *cpu_features, } } + /* Are XTILECFG and XTILEDATA states usable? */ + if ((xcrlow & (bit_XTILECFG_state | bit_XTILEDATA_state)) + == (bit_XTILECFG_state | bit_XTILEDATA_state)) + { + /* Determine if AMX_BF16 is usable. */ + if (CPU_FEATURES_CPU_P (cpu_features, AMX_BF16)) + cpu_features->usable[index_arch_AMX_BF16_Usable] + |= bit_arch_AMX_BF16_Usable; + /* Determine if AMX_TILE is usable. */ + if (CPU_FEATURES_CPU_P (cpu_features, AMX_TILE)) + cpu_features->usable[index_arch_AMX_TILE_Usable] + |= bit_arch_AMX_TILE_Usable; + /* Determine if AMX_INT8 is usable. */ + if (CPU_FEATURES_CPU_P (cpu_features, AMX_INT8)) + cpu_features->usable[index_arch_AMX_INT8_Usable] + |= bit_arch_AMX_INT8_Usable; + } + /* For _dl_runtime_resolve, set xsave_state_size to xsave area size + integer register save size and align it to 64 bytes. */ if (cpu_features->basic.max_cpuid >= 0xd) |