diff options
author | H.J. Lu <hjl.tools@gmail.com> | 2021-06-30 10:47:06 -0700 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2022-02-01 07:12:35 -0800 |
commit | 5b99f172b839da968bd7223f03a985503bccf485 (patch) | |
tree | 8fa178c724fed65b13469d76df10cbf6fd51a667 /sysdeps/x86/cpu-features.c | |
parent | 70d293a158680bd40b07de1cd772bd833ff263f4 (diff) | |
download | glibc-5b99f172b839da968bd7223f03a985503bccf485.tar.gz glibc-5b99f172b839da968bd7223f03a985503bccf485.tar.xz glibc-5b99f172b839da968bd7223f03a985503bccf485.zip |
x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033]
From https://www.intel.com/content/www/us/en/support/articles/000059422/processors.html * Intel TSX will be disabled by default. * The processor will force abort all Restricted Transactional Memory (RTM) transactions by default. * A new CPUID bit CPUID.07H.0H.EDX[11](RTM_ALWAYS_ABORT) will be enumerated, which is set to indicate to updated software that the loaded microcode is forcing RTM abort. * On processors that enumerate support for RTM, the CPUID enumeration bits for Intel TSX (CPUID.07H.0H.EBX[11] and CPUID.07H.0H.EBX[4]) continue to be set by default after microcode update. * Workloads that were benefited from Intel TSX might experience a change in performance. * System software may use a new bit in Model-Specific Register (MSR) 0x10F TSX_FORCE_ABORT[TSX_CPUID_CLEAR] functionality to clear the Hardware Lock Elision (HLE) and RTM bits to indicate to software that Intel TSX is disabled. 1. Add RTM_ALWAYS_ABORT to CPUID features. 2. Set RTM usable only if RTM_ALWAYS_ABORT isn't set. This skips the string/tst-memchr-rtm etc. testcases on the affected processors, which always fail after a microcde update. 3. Check RTM feature, instead of usability, against /proc/cpuinfo. This fixes BZ #28033. (cherry picked from commit ea8e465a6b8d0f26c72bcbe453a854de3abf68ec)
Diffstat (limited to 'sysdeps/x86/cpu-features.c')
-rw-r--r-- | sysdeps/x86/cpu-features.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index ffd1bdb10c..b996b8593f 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -333,6 +333,9 @@ init_cpu_features (struct cpu_features *cpu_features) get_extended_indices (cpu_features); + if (CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT)) + cpu_features->cpuid[index_cpu_RTM].reg_RTM &= ~bit_cpu_RTM; + if (family == 0x06) { model += extended_model; |