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authorAdhemerval Zanella <adhemerval.zanella@linaro.org>2021-06-22 16:41:28 -0300
committerAdhemerval Zanella <adhemerval.zanella@linaro.org>2021-06-24 09:57:46 -0300
commite3e3eb0a2ea615c272cec5f47ba9f243ccdaf386 (patch)
tree67861e0d5cab0df49dc7a76527317b793d2ef047 /sysdeps/x86/bits/platform/x86.h
parentea26ff03227d7cacef5de6036df57734373449b4 (diff)
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x86: Fix tst-cpu-features-cpuinfo on Ryzen 9 (BZ #27873)
AMD define different flags for IRPB, IBRS, and STIPBP [1], so new
x86_64_cpu are added and IBRS_IBPB is only tested for Intel.

The SSDB is also defined and implemented different on AMD [2],
and also a new AMD_SSDB flag is added.  It should map to the
cpuinfo 'ssdb' on recent AMD cpus.

It fixes tst-cpu-features-cpuinfo and tst-cpu-features-cpuinfo-static
on recent AMD cpus.

Checked on x86_64-linux-gnu on AMD Ryzen 9 5900X.

[1] https://developer.amd.com/wp-content/resources/Architecture_Guidelines_Update_Indirect_Branch_Control.pdf
[2] https://bugzilla.kernel.org/show_bug.cgi?id=199889

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Diffstat (limited to 'sysdeps/x86/bits/platform/x86.h')
-rw-r--r--sysdeps/x86/bits/platform/x86.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index fe08d8a1b6..26e3b67ede 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -278,6 +278,10 @@ enum
        + cpuid_register_index_ebx * 8 * sizeof (unsigned int)),
 
   x86_cpu_WBNOINVD		= x86_cpu_index_80000008_ebx + 9,
+  x86_cpu_AMD_IBPB	        = x86_cpu_index_80000008_ebx + 12,
+  x86_cpu_AMD_IBRS	        = x86_cpu_index_80000008_ebx + 14,
+  x86_cpu_AMD_STIBP	        = x86_cpu_index_80000008_ebx + 15,
+  x86_cpu_AMD_SSBD	        = x86_cpu_index_80000008_ebx + 24,
 
   x86_cpu_index_7_ecx_1_eax
     = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int)