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authorSunil K Pandey <skpgkp2@gmail.com>2021-12-29 09:05:18 -0800
committerSunil K Pandey <skpgkp2@gmail.com>2021-12-29 11:37:55 -0800
commitaa1809a1dfde88e5df73edba14b30e488b267343 (patch)
treee22646d81ab1bd03aa0b3295aeba2569b6f3a5c5 /sysdeps/unix
parent76ddc74e86f7bc36468736dd22c4c29e39cd62d8 (diff)
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x86-64: Add vector sinh/sinhf implementation to libmvec
Implement vectorized sinh/sinhf containing SSE, AVX, AVX2 and
AVX512 versions for libmvec as per vector ABI.  It also contains
accuracy and ABI tests for vector sinh/sinhf with regenerated ulps.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
Diffstat (limited to 'sysdeps/unix')
-rw-r--r--sysdeps/unix/sysv/linux/x86_64/libmvec.abilist8
1 files changed, 8 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
index c9d3213bd3..f9d7b085ab 100644
--- a/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
+++ b/sysdeps/unix/sysv/linux/x86_64/libmvec.abilist
@@ -53,6 +53,7 @@ GLIBC_2.35 _ZGVbN2v_cosh F
 GLIBC_2.35 _ZGVbN2v_exp10 F
 GLIBC_2.35 _ZGVbN2v_exp2 F
 GLIBC_2.35 _ZGVbN2v_expm1 F
+GLIBC_2.35 _ZGVbN2v_sinh F
 GLIBC_2.35 _ZGVbN2vv_hypot F
 GLIBC_2.35 _ZGVbN4v_acosf F
 GLIBC_2.35 _ZGVbN4v_asinf F
@@ -61,6 +62,7 @@ GLIBC_2.35 _ZGVbN4v_coshf F
 GLIBC_2.35 _ZGVbN4v_exp10f F
 GLIBC_2.35 _ZGVbN4v_exp2f F
 GLIBC_2.35 _ZGVbN4v_expm1f F
+GLIBC_2.35 _ZGVbN4v_sinhf F
 GLIBC_2.35 _ZGVbN4vv_hypotf F
 GLIBC_2.35 _ZGVcN4v_acos F
 GLIBC_2.35 _ZGVcN4v_asin F
@@ -69,6 +71,7 @@ GLIBC_2.35 _ZGVcN4v_cosh F
 GLIBC_2.35 _ZGVcN4v_exp10 F
 GLIBC_2.35 _ZGVcN4v_exp2 F
 GLIBC_2.35 _ZGVcN4v_expm1 F
+GLIBC_2.35 _ZGVcN4v_sinh F
 GLIBC_2.35 _ZGVcN4vv_hypot F
 GLIBC_2.35 _ZGVcN8v_acosf F
 GLIBC_2.35 _ZGVcN8v_asinf F
@@ -77,6 +80,7 @@ GLIBC_2.35 _ZGVcN8v_coshf F
 GLIBC_2.35 _ZGVcN8v_exp10f F
 GLIBC_2.35 _ZGVcN8v_exp2f F
 GLIBC_2.35 _ZGVcN8v_expm1f F
+GLIBC_2.35 _ZGVcN8v_sinhf F
 GLIBC_2.35 _ZGVcN8vv_hypotf F
 GLIBC_2.35 _ZGVdN4v_acos F
 GLIBC_2.35 _ZGVdN4v_asin F
@@ -85,6 +89,7 @@ GLIBC_2.35 _ZGVdN4v_cosh F
 GLIBC_2.35 _ZGVdN4v_exp10 F
 GLIBC_2.35 _ZGVdN4v_exp2 F
 GLIBC_2.35 _ZGVdN4v_expm1 F
+GLIBC_2.35 _ZGVdN4v_sinh F
 GLIBC_2.35 _ZGVdN4vv_hypot F
 GLIBC_2.35 _ZGVdN8v_acosf F
 GLIBC_2.35 _ZGVdN8v_asinf F
@@ -93,6 +98,7 @@ GLIBC_2.35 _ZGVdN8v_coshf F
 GLIBC_2.35 _ZGVdN8v_exp10f F
 GLIBC_2.35 _ZGVdN8v_exp2f F
 GLIBC_2.35 _ZGVdN8v_expm1f F
+GLIBC_2.35 _ZGVdN8v_sinhf F
 GLIBC_2.35 _ZGVdN8vv_hypotf F
 GLIBC_2.35 _ZGVeN16v_acosf F
 GLIBC_2.35 _ZGVeN16v_asinf F
@@ -101,6 +107,7 @@ GLIBC_2.35 _ZGVeN16v_coshf F
 GLIBC_2.35 _ZGVeN16v_exp10f F
 GLIBC_2.35 _ZGVeN16v_exp2f F
 GLIBC_2.35 _ZGVeN16v_expm1f F
+GLIBC_2.35 _ZGVeN16v_sinhf F
 GLIBC_2.35 _ZGVeN16vv_hypotf F
 GLIBC_2.35 _ZGVeN8v_acos F
 GLIBC_2.35 _ZGVeN8v_asin F
@@ -109,4 +116,5 @@ GLIBC_2.35 _ZGVeN8v_cosh F
 GLIBC_2.35 _ZGVeN8v_exp10 F
 GLIBC_2.35 _ZGVeN8v_exp2 F
 GLIBC_2.35 _ZGVeN8v_expm1 F
+GLIBC_2.35 _ZGVeN8v_sinh F
 GLIBC_2.35 _ZGVeN8vv_hypot F