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author | Geoff Keating <geoffk@cygnus.com> | 2002-08-22 19:07:46 +0000 |
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committer | Geoff Keating <geoffk@cygnus.com> | 2002-08-22 19:07:46 +0000 |
commit | b8a5737a496ae3893f5f924852ad2cec565457b4 (patch) | |
tree | 4526094d02d07a38f24f106d3e34a36f52cb8932 /sysdeps/unix/sysv | |
parent | 7a14a672b9a9af25c0119f89af620532099fad95 (diff) | |
download | glibc-b8a5737a496ae3893f5f924852ad2cec565457b4.tar.gz glibc-b8a5737a496ae3893f5f924852ad2cec565457b4.tar.xz glibc-b8a5737a496ae3893f5f924852ad2cec565457b4.zip |
2002-08-22 Steven Munroe <sjmunroe@us.ibm.com>
* sysdeps/powerpc/elf/libc-start.c (__cache_line_size): Declare. (__aux_init_cache): New. (__libc_start_main): Change type of `auxvec' parameter to `ElfW(auxv_t) *'. Correct walking of aux vector. Call __aux_init_cache. * sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c (__cache_line_size): Declare. (__aux_init_cache): New. (DL_PLATFORM_INIT): Define. * sysdeps/powerpc/memset.S: Define __cache_line_size and use its value to select the correct stride for dcbz. 2002-08-22 Steven Munroe <sjmunroe@us.ibm.com> * sysdeps/powerpc/elf/libc-start.c (__cache_line_size): Declare. (__aux_init_cache): New. (__libc_start_main): Change type of `auxvec' parameter to `ElfW(auxv_t) *'. Correct walking of aux vector. Call __aux_init_cache. * sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c (__cache_line_size): Declare. (__aux_init_cache): New. (DL_PLATFORM_INIT): Define. * sysdeps/powerpc/memset.S: Define __cache_line_size and use its value to select the correct stride for dcbz.
Diffstat (limited to 'sysdeps/unix/sysv')
-rw-r--r-- | sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c index ce3beb9d18..a8687b35b1 100644 --- a/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c +++ b/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c @@ -20,6 +20,32 @@ #include "config.h" #include "kernel-features.h" +#include <ldsodefs.h> + +extern int __cache_line_size; +weak_extern (__cache_line_size) + +#define DL_PLATFORM_INIT __aux_init_cache(_dl_auxv) + +/* Scan the Aux Vector for the "Data Cache Block Size" entry. If found + verify that the static extern __cache_line_size is defined by checking + for not NULL. If it is defined then assign the cache block size + value to __cache_line_size. */ +static inline void +__aux_init_cache (ElfW(auxv_t) *av) +{ + for (; av->a_type != AT_NULL; ++av) + switch (av->a_type) + { + case AT_DCACHEBSIZE: + { + int *cls = & __cache_line_size; + if (cls != NULL) + *cls = av->a_un.a_val; + } + break; + } +} #ifndef __ASSUME_STD_AUXV |