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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2023-06-28 12:19:39 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2023-06-30 09:04:26 +0100 |
| commit | 4a9392ffc27ad280f84779eea3ba01f2c134d1d8 (patch) | |
| tree | 8716efd89aadc70338eeff9622cfcbdd7ff7911e /sysdeps/unix/sysv/linux | |
| parent | 78c01a5cbeb6717ffa2d4d66bb90ac5c39bd81a9 (diff) | |
| download | glibc-4a9392ffc27ad280f84779eea3ba01f2c134d1d8.tar.gz glibc-4a9392ffc27ad280f84779eea3ba01f2c134d1d8.tar.xz glibc-4a9392ffc27ad280f84779eea3ba01f2c134d1d8.zip | |
aarch64: Add vector implementations of exp routines
Optimised implementations for single and double precision, Advanced SIMD and SVE, copied from Arm Optimized Routines. As previously, data tables are used via a barrier to prevent overly aggressive constant inlining. Special-case handlers are marked NOINLINE to avoid incurring the penalty of switching call standards unnecessarily. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/unix/sysv/linux')
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/libmvec.abilist | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist b/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist index 1922191886..ae46ef8c34 100644 --- a/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist +++ b/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist @@ -1,11 +1,15 @@ GLIBC_2.38 _ZGVnN2v_cos F +GLIBC_2.38 _ZGVnN2v_exp F GLIBC_2.38 _ZGVnN2v_log F GLIBC_2.38 _ZGVnN2v_sin F GLIBC_2.38 _ZGVnN4v_cosf F +GLIBC_2.38 _ZGVnN4v_expf F GLIBC_2.38 _ZGVnN4v_logf F GLIBC_2.38 _ZGVnN4v_sinf F GLIBC_2.38 _ZGVsMxv_cos F GLIBC_2.38 _ZGVsMxv_cosf F +GLIBC_2.38 _ZGVsMxv_exp F +GLIBC_2.38 _ZGVsMxv_expf F GLIBC_2.38 _ZGVsMxv_log F GLIBC_2.38 _ZGVsMxv_logf F GLIBC_2.38 _ZGVsMxv_sin F |