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author | H.J. Lu <hjl.tools@gmail.com> | 2012-06-04 12:32:07 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2012-06-04 12:32:07 -0700 |
commit | 68e408ab5da38218efe2521ec089d8c61d5789ad (patch) | |
tree | ac4a7131324a369e3ef86448515d9f61fb6eeed7 /sysdeps/unix/sysv/linux/x86/sys | |
parent | f3d1f93cfbbe9a0ffcab4d72e6cd8def0ca59ada (diff) | |
download | glibc-68e408ab5da38218efe2521ec089d8c61d5789ad.tar.gz glibc-68e408ab5da38218efe2521ec089d8c61d5789ad.tar.xz glibc-68e408ab5da38218efe2521ec089d8c61d5789ad.zip |
Use x86_64 bits/{debugreg,reg}.h for i386 and x86-64
Diffstat (limited to 'sysdeps/unix/sysv/linux/x86/sys')
-rw-r--r-- | sysdeps/unix/sysv/linux/x86/sys/debugreg.h | 88 | ||||
-rw-r--r-- | sysdeps/unix/sysv/linux/x86/sys/reg.h | 77 |
2 files changed, 165 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/x86/sys/debugreg.h b/sysdeps/unix/sysv/linux/x86/sys/debugreg.h new file mode 100644 index 0000000000..de10277e2b --- /dev/null +++ b/sysdeps/unix/sysv/linux/x86/sys/debugreg.h @@ -0,0 +1,88 @@ +/* Copyright (C) 2001-2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _SYS_DEBUGREG_H +#define _SYS_DEBUGREG_H 1 + +/* Indicate the register numbers for a number of the specific + debug registers. Registers 0-3 contain the addresses we wish to trap on */ +#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */ +#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */ + +#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */ +#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */ + +/* Define a few things for the status register. We can use this to determine + which debugging register was responsible for the trap. The other bits + are either reserved or not of interest to us. */ + +#define DR_TRAP0 (0x1) /* db0 */ +#define DR_TRAP1 (0x2) /* db1 */ +#define DR_TRAP2 (0x4) /* db2 */ +#define DR_TRAP3 (0x8) /* db3 */ + +#define DR_STEP (0x4000) /* single-step */ +#define DR_SWITCH (0x8000) /* task switch */ + +/* Now define a bunch of things for manipulating the control register. + The top two bytes of the control register consist of 4 fields of 4 + bits - each field corresponds to one of the four debug registers, + and indicates what types of access we trap on, and how large the data + field is that we are looking at */ + +#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */ +#define DR_CONTROL_SIZE 4 /* 4 control bits per register */ + +#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */ +#define DR_RW_WRITE (0x1) +#define DR_RW_READ (0x3) + +#define DR_LEN_1 (0x0) /* Settings for data length to trap on */ +#define DR_LEN_2 (0x4) +#define DR_LEN_4 (0xC) +#ifdef __x86_64__ +# define DR_LEN_8 (0x8) +#endif + +/* The low byte to the control register determine which registers are + enabled. There are 4 fields of two bits. One bit is "local", meaning + that the processor will reset the bit after a task switch and the other + is global meaning that we have to explicitly reset the bit. With linux, + you can use either one, since we explicitly zero the register when we enter + kernel mode. */ + +#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */ +#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */ +#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */ + +#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */ +#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */ + +/* The second byte to the control register has a few special + things. */ + + + +#ifdef __x86_64__ +# define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00ULL) /* Reserved */ +#else +# define DR_CONTROL_RESERVED (0x00FC00U) /* Reserved */ +#endif +#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */ +#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */ + +#endif /* sys/debugreg.h */ diff --git a/sysdeps/unix/sysv/linux/x86/sys/reg.h b/sysdeps/unix/sysv/linux/x86/sys/reg.h new file mode 100644 index 0000000000..9a23ee0e4a --- /dev/null +++ b/sysdeps/unix/sysv/linux/x86/sys/reg.h @@ -0,0 +1,77 @@ +/* Copyright (C) 2001-2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef _SYS_REG_H +#define _SYS_REG_H 1 + + +#ifdef __x86_64__ +/* Index into an array of 8 byte longs returned from ptrace for + location of the users' stored general purpose registers. */ + +# define R15 0 +# define R14 1 +# define R13 2 +# define R12 3 +# define RBP 4 +# define RBX 5 +# define R11 6 +# define R10 7 +# define R9 8 +# define R8 9 +# define RAX 10 +# define RCX 11 +# define RDX 12 +# define RSI 13 +# define RDI 14 +# define ORIG_RAX 15 +# define RIP 16 +# define CS 17 +# define EFLAGS 18 +# define RSP 19 +# define SS 20 +# define FS_BASE 21 +# define GS_BASE 22 +# define DS 23 +# define ES 24 +# define FS 25 +# define GS 26 +#else + +/* Index into an array of 4 byte integers returned from ptrace for + * location of the users' stored general purpose registers. */ + +# define EBX 0 +# define ECX 1 +# define EDX 2 +# define ESI 3 +# define EDI 4 +# define EBP 5 +# define EAX 6 +# define DS 7 +# define ES 8 +# define FS 9 +# define GS 10 +# define ORIG_EAX 11 +# define EIP 12 +# define CS 13 +# define EFL 14 +# define UESP 15 +# define SS 16 +#endif + +#endif |