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author | Zong Li <zong.li@sifive.com> | 2022-11-09 11:40:59 -0300 |
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committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2022-11-09 11:40:59 -0300 |
commit | 38caf7a1cc92e6a546ea655701c8237ee727d0d3 (patch) | |
tree | 0119619baed0e9e26e682effadca7a553116c7ef /sysdeps/unix/sysv/linux/riscv | |
parent | 1a8335a408430517001a0660f5c7787223ce85e4 (diff) | |
download | glibc-38caf7a1cc92e6a546ea655701c8237ee727d0d3.tar.gz glibc-38caf7a1cc92e6a546ea655701c8237ee727d0d3.tar.xz glibc-38caf7a1cc92e6a546ea655701c8237ee727d0d3.zip |
riscv: Get level 3 cache's information
RISC-V architecture extends the cache information for level 3 cache in AUX vector in Linux v.6.1-rc1. This patch supports sysconf to get the level 3 cache information. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'sysdeps/unix/sysv/linux/riscv')
-rw-r--r-- | sysdeps/unix/sysv/linux/riscv/sysconf.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/riscv/sysconf.c b/sysdeps/unix/sysv/linux/riscv/sysconf.c index b768ebf781..85b9faff71 100644 --- a/sysdeps/unix/sysv/linux/riscv/sysconf.c +++ b/sysdeps/unix/sysv/linux/riscv/sysconf.c @@ -90,6 +90,12 @@ __sysconf (int name) return sysconf_get_cache_associativity (AT_L2_CACHEGEOMETRY); case _SC_LEVEL2_CACHE_LINESIZE: return sysconf_get_cache_linesize (AT_L2_CACHEGEOMETRY); + case _SC_LEVEL3_CACHE_SIZE: + return sysconf_get_cache_size (AT_L3_CACHESIZE); + case _SC_LEVEL3_CACHE_ASSOC: + return sysconf_get_cache_associativity (AT_L3_CACHEGEOMETRY); + case _SC_LEVEL3_CACHE_LINESIZE: + return sysconf_get_cache_linesize (AT_L3_CACHEGEOMETRY); default: return linux_sysconf (name); } |