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| author | Gordana Cmiljanovic <Gordana.Cmiljanovic@imgtec.com> | 2017-06-13 21:34:45 +0000 |
|---|---|---|
| committer | Joseph Myers <joseph@codesourcery.com> | 2017-06-13 21:34:45 +0000 |
| commit | b309f058cf7639951bebb86270ffbc116ea5f720 (patch) | |
| tree | bd42dec0d4649a94e18384bf0294f3c473a6aa83 /sysdeps/unix/sysv/linux/mips/getcontext.S | |
| parent | c2528fef3b05bcffb1ac27c6c09cc3ff24b7f03f (diff) | |
| download | glibc-b309f058cf7639951bebb86270ffbc116ea5f720.tar.gz glibc-b309f058cf7639951bebb86270ffbc116ea5f720.tar.xz glibc-b309f058cf7639951bebb86270ffbc116ea5f720.zip | |
mips: Fix store/load gp registers to/from ucontext_t
General purpose registers in mcontext_t structure are 8 bytes long for both MIPS32/MIPS64. get/set/make/swap context implementations for MIPS O32 incorrectly assume that general purpose registers in this structure are 4 bytes long. This patch is fixing that. Tested for MIPS O32 LE and BE. Compared objdump of modified functions for mips n32 and mips n64. [BZ #21548] * sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for mips o32. * sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added new test for mips o32. * sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
Diffstat (limited to 'sysdeps/unix/sysv/linux/mips/getcontext.S')
| -rw-r--r-- | sysdeps/unix/sysv/linux/mips/getcontext.S | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/sysdeps/unix/sysv/linux/mips/getcontext.S b/sysdeps/unix/sysv/linux/mips/getcontext.S index 64de2ebf2e..aa6f45e68c 100644 --- a/sysdeps/unix/sysv/linux/mips/getcontext.S +++ b/sysdeps/unix/sysv/linux/mips/getcontext.S @@ -38,6 +38,12 @@ MASK = 0x10000000 #endif FRAMESZ = ((LOCALSZ * SZREG) + ALSZ) & ALMASK GPOFF = FRAMESZ - (1 * SZREG) +MCONTEXT_GREGSZ = 8 +#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +MCONTEXT_GREGOFF = 4 +#else +MCONTEXT_GREGOFF = 0 +#endif NESTED (__getcontext, FRAMESZ, ra) .mask MASK, 0 @@ -74,23 +80,24 @@ NESTED (__getcontext, FRAMESZ, ra) /* Store a magic flag. */ li v1, 1 - REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */ - - REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0) - REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0) + /* zero */ + REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + + REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) #if ! defined (__PIC__) || _MIPS_SIM != _ABIO32 - REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0) + REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) #endif - REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0) - REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0) - REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0) - REG_S ra, MCONTEXT_PC(a0) + REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0) + REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0) #ifdef __mips_hard_float # if _MIPS_SIM == _ABI64 |