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author | Ulrich Drepper <drepper@redhat.com> | 1998-09-10 14:09:11 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 1998-09-10 14:09:11 +0000 |
commit | 39382b8ba41a02240424309a1b37a88488c58be3 (patch) | |
tree | a95458d60934b4004e476a298df2868400f06780 /sysdeps/unix/sysv/linux/i386/sys | |
parent | 2c86b2bc6e6b28dc8c6bf0384e90d1eb4a05af8d (diff) | |
download | glibc-39382b8ba41a02240424309a1b37a88488c58be3.tar.gz glibc-39382b8ba41a02240424309a1b37a88488c58be3.tar.xz glibc-39382b8ba41a02240424309a1b37a88488c58be3.zip |
Update.
* sysdeps/unix/sysv/linux/Makefile (subdirs==misc) [sysdep_headers]: Remove sys/debugreg.h. * sysdeps/unix/sysv/linux/i386/Makefile (subdirs==misc) [sysdep_headers]: Add sys/debugreg.h. * sysdeps/unix/sysv/linux/sys/debugreg.h: Removed. * sysdeps/unix/sysv/linux/i386/sys/debugreg.h: New file.
Diffstat (limited to 'sysdeps/unix/sysv/linux/i386/sys')
-rw-r--r-- | sysdeps/unix/sysv/linux/i386/sys/debugreg.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/i386/sys/debugreg.h b/sysdeps/unix/sysv/linux/i386/sys/debugreg.h new file mode 100644 index 0000000000..8aafd670b4 --- /dev/null +++ b/sysdeps/unix/sysv/linux/i386/sys/debugreg.h @@ -0,0 +1,81 @@ +/* Copyright (C) 1998 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If not, + write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, + Boston, MA 02111-1307, USA. */ + +#ifndef _SYS_DEBUGREG_H +#define _SYS_DEBUGREG_H 1 + +/* Indicate the register numbers for a number of the specific + debug registers. Registers 0-3 contain the addresses we wish to trap on */ +#define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */ +#define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */ + +#define DR_STATUS 6 /* u_debugreg[DR_STATUS] */ +#define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */ + +/* Define a few things for the status register. We can use this to determine + which debugging register was responsible for the trap. The other bits + are either reserved or not of interest to us. */ + +#define DR_TRAP0 (0x1) /* db0 */ +#define DR_TRAP1 (0x2) /* db1 */ +#define DR_TRAP2 (0x4) /* db2 */ +#define DR_TRAP3 (0x8) /* db3 */ + +#define DR_STEP (0x4000) /* single-step */ +#define DR_SWITCH (0x8000) /* task switch */ + +/* Now define a bunch of things for manipulating the control register. + The top two bytes of the control register consist of 4 fields of 4 + bits - each field corresponds to one of the four debug registers, + and indicates what types of access we trap on, and how large the data + field is that we are looking at */ + +#define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */ +#define DR_CONTROL_SIZE 4 /* 4 control bits per register */ + +#define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */ +#define DR_RW_WRITE (0x1) +#define DR_RW_READ (0x3) + +#define DR_LEN_1 (0x0) /* Settings for data length to trap on */ +#define DR_LEN_2 (0x4) +#define DR_LEN_4 (0xC) + +/* The low byte to the control register determine which registers are + enabled. There are 4 fields of two bits. One bit is "local", meaning + that the processor will reset the bit after a task switch and the other + is global meaning that we have to explicitly reset the bit. With linux, + you can use either one, since we explicitly zero the register when we enter + kernel mode. */ + +#define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */ +#define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */ +#define DR_ENABLE_SIZE 2 /* 2 enable bits per register */ + +#define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */ +#define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */ + +/* The second byte to the control register has a few special things. + We can slow the instruction pipeline for instructions coming via the + gdt or the ldt if we want to. I am not sure why this is an advantage */ + +#define DR_CONTROL_RESERVED (0xFC00) /* Reserved by Intel */ +#define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */ +#define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */ + +#endif /* sys/debugreg.h */ |