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| author | Carlos Eduardo Seo <carlos.seo@arm.com> | 2020-11-13 16:33:07 -0300 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2022-08-05 19:45:19 +0100 |
| commit | 2f3bf4cf639b49fd5a37ea300d84b638af8cde46 (patch) | |
| tree | f387219d25dcf786a76c1cd8cc65b535a6f65e71 /sysdeps/unix/sysv/linux/aarch64/cpu-features.h | |
| parent | ccce788403ca63581a3ab08b619368223ed2502e (diff) | |
| download | glibc-2f3bf4cf639b49fd5a37ea300d84b638af8cde46.tar.gz glibc-2f3bf4cf639b49fd5a37ea300d84b638af8cde46.tar.xz glibc-2f3bf4cf639b49fd5a37ea300d84b638af8cde46.zip | |
TODO(drop): aarch64: morello: CPU feature detection for Morello arm/morello/v1
Initial detection of Arm Morello architecture from the HWCAP2 bit and CPU identification from MIDR_EL0. TODO: not needed? - lp64 does not have to detect - purecap can assume morello
Diffstat (limited to 'sysdeps/unix/sysv/linux/aarch64/cpu-features.h')
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 391165a99c..0742ac1409 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -68,6 +68,11 @@ #define IS_A64FX(midr) (MIDR_IMPLEMENTOR(midr) == 'F' \ && MIDR_PARTNUM(midr) == 0x001) +/* TODO: This is based on the Morello Fast Model. + Will MIDR_IMPLEMENTOR change to 'A'? */ +#define IS_MORELLO(midr) (MIDR_IMPLEMENTOR(midr) == 0x3f \ + && MIDR_PARTNUM(midr) == 0x412) + struct cpu_features { uint64_t midr_el1; @@ -76,6 +81,7 @@ struct cpu_features /* Currently, the GLIBC memory tagging tunable only defines 8 bits. */ uint8_t mte_state; bool sve; + bool morello; }; #endif /* _CPU_FEATURES_AARCH64_H */ |