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| author | Wilco Dijkstra <Wilco.Dijkstra@arm.com> | 2018-12-19 18:28:24 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2019-01-09 10:35:34 +0000 |
| commit | 02f440c1ef5d5d79552a524065aa3e2fabe469b9 (patch) | |
| tree | edffea1dbdd7ecb69885170e9b06fda564ebe7f7 /sysdeps/unix/sysv/linux/aarch64/cpu-features.c | |
| parent | 69da3c9e87e0a692e79db0615a53782e4198dbf0 (diff) | |
| download | glibc-02f440c1ef5d5d79552a524065aa3e2fabe469b9.tar.gz glibc-02f440c1ef5d5d79552a524065aa3e2fabe469b9.tar.xz glibc-02f440c1ef5d5d79552a524065aa3e2fabe469b9.zip | |
[AArch64] Add ifunc support for Ares
Add Ares to the midr_el0 list and support ifunc dispatch. Since Ares supports 2 128-bit loads/stores, use Neon registers for memcpy by selecting __memcpy_falkor by default (we should rename this to __memcpy_simd or similar). * manual/tunables.texi (glibc.cpu.name): Add ares tunable. * sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use __memcpy_falkor for ares. * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES): Add new define. * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): Add ares cpu.
Diffstat (limited to 'sysdeps/unix/sysv/linux/aarch64/cpu-features.c')
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index ce5998ae73..4243ceda07 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -36,6 +36,7 @@ static struct cpu_list cpu_list[] = { {"thunderx2t99", 0x431F0AF0}, {"thunderx2t99p1", 0x420F5160}, {"phecda", 0x680F0000}, + {"ares", 0x411FD0C0}, {"generic", 0x0} }; |