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author | Torvald Riegel <triegel@redhat.com> | 2014-10-18 01:02:59 +0200 |
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committer | Torvald Riegel <triegel@redhat.com> | 2014-11-20 11:57:38 +0100 |
commit | 1ea339b69725cb2f30b5a84cb7ca96111c9a637b (patch) | |
tree | 130609da9190b04afb366f3a506d3415ea2f982f /sysdeps/tile | |
parent | d960211ff52a6ab632eace2f905c4898f187df9e (diff) | |
download | glibc-1ea339b69725cb2f30b5a84cb7ca96111c9a637b.tar.gz glibc-1ea339b69725cb2f30b5a84cb7ca96111c9a637b.tar.xz glibc-1ea339b69725cb2f30b5a84cb7ca96111c9a637b.zip |
Add arch-specific configuration for C11 atomics support.
This sets __HAVE_64B_ATOMICS if provided. It also sets USE_ATOMIC_COMPILER_BUILTINS to true if the existing atomic ops use the __atomic* builtins (aarch64, mips partially) or if this has been tested (x86_64); otherwise, this is set to false so that C11 atomics will be based on the existing atomic operations.
Diffstat (limited to 'sysdeps/tile')
-rw-r--r-- | sysdeps/tile/tilegx/bits/atomic.h | 3 | ||||
-rw-r--r-- | sysdeps/tile/tilepro/bits/atomic.h | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/tile/tilegx/bits/atomic.h b/sysdeps/tile/tilegx/bits/atomic.h index ce12db0216..9aa299f03b 100644 --- a/sysdeps/tile/tilegx/bits/atomic.h +++ b/sysdeps/tile/tilegx/bits/atomic.h @@ -21,6 +21,9 @@ #include <arch/spr_def.h> +#define __HAVE_64B_ATOMICS 1 +#define USE_ATOMIC_COMPILER_BUILTINS 0 + /* Pick appropriate 8- or 4-byte instruction. */ #define __atomic_update(mem, v, op) \ ((__typeof (*(mem))) (__typeof (*(mem) - *(mem))) \ diff --git a/sysdeps/tile/tilepro/bits/atomic.h b/sysdeps/tile/tilepro/bits/atomic.h index cbbf64cef1..c3865bee2f 100644 --- a/sysdeps/tile/tilepro/bits/atomic.h +++ b/sysdeps/tile/tilepro/bits/atomic.h @@ -21,6 +21,9 @@ #include <asm/unistd.h> +#define __HAVE_64B_ATOMICS 0 +#define USE_ATOMIC_COMPILER_BUILTINS 0 + /* 32-bit integer compare-and-exchange. */ static __inline __attribute__ ((always_inline)) int __atomic_cmpxchg_32 (volatile int *mem, int newval, int oldval) |