Make sure tilepro uses kernel atomics fo atomic_store

It's not legal for raw stores to be mixed with atomic operations
on tilepro, since the atomics are managed by kernel fast syscalls.
It's possible for a hardware store and a kernel fast atomic to race
with each other in such a way that the hardware store is lost.

Suppose you have an initial zero value, and you race with a store
of 2 and a kernel cmpxchg from 0 to 1.  The legal output is only 2:
either the store hit first and the cmpxchg failed, or the cmpxchg
hit first and succeeded, then was overwritten by the 2.  But if
the kernel cmpxchg starts first and loads the zero, then the store
hits and sets the value to 2, the cmpxchg will still decide it was
successful and write the 1, leaving the value illegally set to 1.

Using atomic_exchange variants to implement atomic_store fixes this
problem for tilepro.

1 files changed, 10 insertions, 0 deletions

diff --git a/sysdeps/tile/tilepro/atomic-machine.h b/sysdeps/tile/tilepro/atomic-machine.h
index 702e17d77d..5365929c94 100644
--- a/sysdeps/tile/tilepro/atomic-machine.h
+++ b/sysdeps/tile/tilepro/atomic-machine.h
@@ -83,6 +83,16 @@ int __atomic_update_32 (volatile int *mem, int mask, int addend)
   ({ __typeof (mask) __att1_v = (mask);                 \
     __atomic_update ((mem), ~__att1_v, __att1_v); })
 
+/*
+ * We must use the kernel atomics for atomic_store, since otherwise an
+ * unsynchronized store could become visible after another core's
+ * kernel-atomic implementation had read the memory word in question,
+ * but before it had written the updated value to it, which would
+ * cause the unsynchronized store to be lost.
+ */
+#define atomic_store_relaxed(mem, val) atomic_exchange_acq (mem, val)
+#define atomic_store_release(mem, val) atomic_exchange_rel (mem, val)
+
 #include <sysdeps/tile/atomic-machine.h>
 
 #endif /* atomic-machine.h */