about summary refs log tree commit diff
path: root/sysdeps/sparc
diff options
context:
space:
mode:
authorTorvald Riegel <triegel@redhat.com>2015-06-23 15:22:25 +0200
committerTorvald Riegel <triegel@redhat.com>2015-06-30 15:57:15 +0200
commit4eb984d3ab5641ce7992204756ac15a61f5f7181 (patch)
tree12603bae9d2582033a3186174d1379121e1ea642 /sysdeps/sparc
parente02920bc029019443326eecaa7b267b78ff2892e (diff)
downloadglibc-4eb984d3ab5641ce7992204756ac15a61f5f7181.tar.gz
glibc-4eb984d3ab5641ce7992204756ac15a61f5f7181.tar.xz
glibc-4eb984d3ab5641ce7992204756ac15a61f5f7181.zip
Clean up BUSY_WAIT_NOP and atomic_delay.
This patch combines BUSY_WAIT_NOP and atomic_delay into a new
atomic_spin_nop function and adjusts all clients.  The new function is
put into atomic.h because what is best done in a spin loop is
architecture-specific, and atomics must be used for spinning.  The
function name is meant to tell users that this has no effect on
synchronization semantics but is a performance aid for spinning.
Diffstat (limited to 'sysdeps/sparc')
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/bits/atomic.h3
-rw-r--r--sysdeps/sparc/sparc64/bits/atomic.h3
2 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h b/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
index 317be62ccb..2122afbb09 100644
--- a/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
+++ b/sysdeps/sparc/sparc32/sparcv9/bits/atomic.h
@@ -100,3 +100,6 @@ typedef uintmax_t uatomic_max_t;
   __asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
 #define atomic_write_barrier() \
   __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")
+
+extern void __cpu_relax (void);
+#define atomic_spin_nop () __cpu_relax ()
diff --git a/sysdeps/sparc/sparc64/bits/atomic.h b/sysdeps/sparc/sparc64/bits/atomic.h
index 35804a8e14..48b7fd6216 100644
--- a/sysdeps/sparc/sparc64/bits/atomic.h
+++ b/sysdeps/sparc/sparc64/bits/atomic.h
@@ -121,3 +121,6 @@ typedef uintmax_t uatomic_max_t;
   __asm __volatile ("membar #LoadLoad | #LoadStore" : : : "memory")
 #define atomic_write_barrier() \
   __asm __volatile ("membar #LoadStore | #StoreStore" : : : "memory")
+
+extern void __cpu_relax (void);
+#define atomic_spin_nop () __cpu_relax ()