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authorUlrich Drepper <drepper@redhat.com>2002-05-21 02:15:01 +0000
committerUlrich Drepper <drepper@redhat.com>2002-05-21 02:15:01 +0000
commitcf29934141e8e27bd66c9a7fe4f4c217878365a7 (patch)
treeb1c57ba760d4820a1e1d9c76c3e9b48f627d60a3 /sysdeps/sparc/sparc64/strncmp.S
parent509bd8e35ad842944074e43cd2cc22381ee13f5b (diff)
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Update.
2002-05-17  David S. Miller  <davem@redhat.com>

	* sysdeps/unix/sysv/linux/sparc/fork.S: Define _internal aliases.

2002-05-16  David S. Miller  <davem@redhat.com>

	* sysdeps/sparc/sparc32/dl-machine.h (LOAD_PIC_REG): Define.
	(elf_machine_dynamic): Use it to force PIC register to be loaded.
	(elf_machine_load_address): Likewise.
	* sysdeps/sparc/sparc64/dl-machine.h: Mirror sparc32 changes.

	* sysdeps/sparc/sparc64/strncmp.S: When second argument pointer
	is unaligned, do not forget to fully initialize %g1 magic value.

	* sysdeps/unix/sysv/linux/sparc/sys/procfs.h: Fix 64-bit elf
	register definitions and provide 32-bit variants of structures
	during 64-bit builds.

	* soft-fp/op-1.h (_FP_FRAC_CLEAR_OVERP_1): Define.
	* soft-fp/op-2.h (_FP_FRAC_CLEAR_OVERP_2): Define.
	* soft-fp/op-4.h (_FP_FRAC_CLEAR_OVERP_4): Define.
	* soft-fp/op-common.h (_FP_PACK_CANONICAL): After rounding, if
	_FP_FRAC_OVERP_X is set, use _FP_FRAC_CLEAR_OVERP_X to clear it.
	(_FP_FROM_INT): Perform right shifts on unsigned integer type.
	Do not clear implicit one bit here, it must be done post-rounding.
	Only pad to the left using left shift if value uses less than the
	available fractional bits.
Diffstat (limited to 'sysdeps/sparc/sparc64/strncmp.S')
-rw-r--r--sysdeps/sparc/sparc64/strncmp.S11
1 files changed, 6 insertions, 5 deletions
diff --git a/sysdeps/sparc/sparc64/strncmp.S b/sysdeps/sparc/sparc64/strncmp.S
index 3bc21d6664..31fcfeee08 100644
--- a/sysdeps/sparc/sparc64/strncmp.S
+++ b/sysdeps/sparc/sparc64/strncmp.S
@@ -290,14 +290,15 @@ ENTRY(strncmp)
 	 ldxa		[%o0] ASI_PNF, %g4		/* Load				*/
 11:	sllx		%g3, 3, %g5			/* IEU0		Group		*/
 	mov		64, %g7				/* IEU1				*/
-	sub		%o1, %g3, %o1			/* IEU0		Group		*/
+	or		%g1, %g2, %g1			/* IEU0		Group		*/
+	sub		%o1, %g3, %o1			/* IEU1				*/
 
-	sub		%g7, %g5, %g7			/* IEU1				*/
+	sub		%g7, %g5, %g7			/* IEU0		Group		*/
 	ldxa		[%o1] ASI_PNF, %o4		/* Load				*/
-	sllx		%g1, 7, %g2			/* IEU0		Group		*/
-	add		%o1, 8, %o1			/* IEU1				*/
+	sllx		%g1, 7, %g2			/* IEU1				*/
+	add		%o1, 8, %o1			/* IEU0		Group		*/
 							/* %g1 = 0101010101010101
-							   %g2 = 8080808080800880
+							   %g2 = 8080808080808080
 							   %g3 = %o1 alignment
 							   %g5 = number of bits to shift left
 							   %g7 = number of bits to shift right */